Patents by Inventor Jin Wu PARK

Jin Wu PARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11482452
    Abstract: In a method of forming a contact plug in a semiconductor integrated circuit device, the contact plug may be formed in a process chamber of a substrate-processing apparatus. The process chamber may have a process space. The process chamber may include a substrate supporter placed in a lower region of the process space to support a semiconductor substrate, and a gas injector placed in an upper region of the process space to inject a gas to the semiconductor substrate. An insulating interlayer having a contact hole may be formed on the semiconductor substrate loaded into the process space. A nucleation layer may be formed on an inner surface of the contact hole and an upper surface of the insulating interlayer. A semi-bulk layer may be formed on the nucleation layer in a lower region of the contact hole. An inhibiting layer may be formed on the semi-bulk layer and the exposed nucleation layer. A main-bulk layer may be formed on the semi-bulk layer to fill the contact hole with the main-bulk layer.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: October 25, 2022
    Assignee: WONIK IPS CO., LTD
    Inventors: Won Jun Yoon, Woo Hoon Sun, Seok Kyu Choi, Tae Sung Han, Dong Woo Kim, Jin Wu Park
  • Publication number: 20220208605
    Abstract: In a method of forming a contact plug in a semiconductor integrated circuit device, the contact plug may be formed in a process chamber of a substrate-processing apparatus. The process chamber may have a process space. The process chamber may include a substrate supporter placed in a lower region of the process space to support a semiconductor substrate, and a gas injector placed in an upper region of the process space to inject a gas to the semiconductor substrate. An insulating interlayer having a contact hole may be formed on the semiconductor substrate loaded into the process space. A nucleation layer may be formed on an inner surface of the contact hole and an upper surface of the insulating interlayer. A semi-bulk layer may be formed on the nucleation layer in a lower region of the contact hole. An inhibiting layer may be formed on the semi-bulk layer and the exposed nucleation layer. A main-bulk layer may be formed on the semi-bulk layer to fill the contact hole with the main-bulk layer.
    Type: Application
    Filed: December 24, 2020
    Publication date: June 30, 2022
    Inventors: Won Jun YOON, Woo Hoon SUN, Seok Kyu CHOI, Tae Sung HAN, Dong Woo KIM, Jin Wu PARK