Patents by Inventor Jin Yo Park

Jin Yo Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10090058
    Abstract: A semiconductor device may be provided. The semiconductor device may be configured for detecting a defect of a fuse set. The semiconductor device may include a pseudo initial signal generator configured to generate pseudo initial information on the basis of a test mode signal. The semiconductor device may include a fuse-set defect detector configured to compare fuse-set information of a fuse set or the pseudo initial information with a reference value on the basis of a fuse-set address, and detect a defect of the fuse set.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: October 2, 2018
    Assignee: SK hynix Inc.
    Inventors: Sung Soo Chi, Dong Woo Lyu, Jin Yo Park, Sang Kyung Shin, Kwang Soo Ahn, Sung Su Cha
  • Publication number: 20180082754
    Abstract: A semiconductor device may be provided. The semiconductor device may be configured for detecting a defect of a fuse set. The semiconductor device may include a pseudo initial signal generator configured to generate pseudo initial information on the basis of a test mode signal. The semiconductor device may include a fuse-set defect detector configured to compare fuse-set information of a fuse set or the pseudo initial information with a reference value on the basis of a fuse-set address, and detect a defect of the fuse set.
    Type: Application
    Filed: March 6, 2017
    Publication date: March 22, 2018
    Applicant: SK hynix Inc.
    Inventors: Sung Soo CHI, Dong Woo LYU, Jin Yo PARK, Sang Kyung SHIN, Kwang Soo AHN, Sung Su CHA
  • Patent number: 6274425
    Abstract: Disclosed is a method for manufacturing a semiconductor device. The method comprises the steps of forming a bit line contact plug and a storage electrode contact plug which are connected to a semiconductor substrate; etching a capping nitride film above a word line which is positioned at a peripheral circuit part of the semiconductor substrate; forming a bit line which is connected to the bit line contact plug and the word line; etching a capping nitride film above the bit line of the peripheral circuit part; and forming a metal wiring contact hole which reveals the semiconductor substrate, the word line and the bit line.
    Type: Grant
    Filed: December 27, 1999
    Date of Patent: August 14, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jin Yo Park