Abstract: A slave device includes: a serial communications slave having an address designated for performing serial communications with a master; a single address determination pin configured to be, selectively, connected to a power terminal without being connected to a first external resistor, connected to a ground terminal without being connected through a second external resistor, connected to the power terminal through the first external resistor, or connected to the ground terminal through a second external resistor; and an address allocator configured to designate the address of the serial communications slave based on a plurality of state bits determined depending on a connection state of the single address determination pin.

Abstract: An optical image stabilization (OIS) circuit, applied to an OIS device including a single sensor configured to provide sensor data is provided. The OIS circuit includes a main OIS circuit configured to output a control signal to the sensor, and receive the control signal from the sensor with sensor data, output an interruption signal to initiate a control operation, and control a main OIS operation, and a sub-OIS circuit configured to be synchronized with the main OIS circuit based on the control signal input with the sensor data, and control a sub OIS operation based on the interruption signal.

Abstract: A slave device includes: a serial communications slave having an address designated for performing serial communications with a master; a single address determination pin configured to be, selectively, connected to a power terminal without being connected to a first external resistor, connected to a ground terminal without being connected through a second external resistor, connected to the power terminal through the first external resistor, or connected to the ground terminal through a second external resistor; and an address allocator configured to designate the address of the serial communications slave based on a plurality of state bits determined depending on a connection state of the single address determination pin.

Abstract: An optical image stabilization (OIS) circuit, applied to an OIS device including a single sensor configured to provide sensor data is provided. The OIS circuit includes a main OIS circuit configured to output a control signal to the sensor, and receive the control signal from the sensor with sensor data, output an interruption signal to initiate a control operation, and control a main OIS operation, and a sub-OIS circuit configured to be synchronized with the main OIS circuit based on the control signal input with the sensor data, and control a sub OIS operation based on the interruption signal.

Abstract: A camera module includes a first driver integrated circuit (IC) generating a driving signal to move a first lens barrel in one or more directions perpendicular to an optical axis direction, a second driver IC generating a driving signal to move a second lens barrel in one or more directions perpendicular to the optical axis direction, and a gyro sensor generating gyro data corresponding to a first address transmitted from the first driver IC, and transmitting the gyro data to the first driver IC and the second driver IC.

Abstract: A camera module includes a first driver integrated circuit (IC) generating a driving signal to move a first lens barrel in one or more directions perpendicular to an optical axis direction, a second driver IC generating a driving signal to move a second lens barrel in one or more directions perpendicular to the optical axis direction, and a gyro sensor generating gyro data corresponding to a first address transmitted from the first driver IC, and transmitting the gyro data to the first driver IC and the second driver IC.

Abstract: An actuator of a camera module includes a magnetic body disposed on one side surface of a lens barrel, a driving coil, and a driving apparatus. The driving coil faces the magnetic body. The driving apparatus is configured to drive the driving coil in one of a linear driving scheme and a pulse width modulation (PWM) driving scheme based on an external illumination information in an illumination signal and move the lens barrel in a direction perpendicular to an optical axis direction.

Abstract: A high frequency multichannel pulse width modulation (PWM) control apparatus includes a pre-scaler configured to divide a frequency of a main clock signal to generate a first clock signal, and a multichannel PWM generator including first to n-th PWM generators, the PWM generators comprising corresponding periods and duties, configured to generate, respectively, first to n-th PWM signals, through first and second N/2-bit counting for the main clock signal, using the first clock signal, wherein each of the first to n-th PWM generators performs the first N/2-bit counting on the main clock signal based on the first clock signal, a corresponding coarse duty value, and a corresponding coarse period value to generate a fine clock signal, and performs the second N/2-bit counting on the fine clock signal based on a corresponding fine duty value and a corresponding fine period value to generate a corresponding PWM signal.

Abstract: A pulse width modulation (PWM) apparatus includes an enable pulse generating circuit configured to generate an enable pulse signal based on a control clock, a short pulse generating circuit configured to generate a short pulse signal based on the enable pulse signal, a delay chain circuit configured to generate first to nth delay signals based on the short pulse signal, each of the first to nth delay signals having different delay times, a trigger circuit configured to select any one of the short pulse signal and the first to nth delay signals and generate a trigger signal, in response to an input selection signal, and a PWM signal generating circuit configured to generate a PWM signal based on the trigger signal.

Abstract: A high frequency multichannel pulse width modulation (PWM) control apparatus includes a pre-scaler configured to divide a frequency of a main clock signal to generate a first clock signal, and a multichannel PWM generator including first to n-th PWM generators, the PWM generators comprising corresponding periods and duties, configured to generate, respectively, first to n-th PWM signals, through first and second N/2-bit counting for the main clock signal, using the first clock signal, wherein each of the first to n-th PWM generators performs the first N/2-bit counting on the main clock signal based on the first clock signal, a corresponding coarse duty value, and a corresponding coarse period value to generate a fine clock signal, and performs the second N/2-bit counting on the fine clock signal based on a corresponding fine duty value and a corresponding fine period value to generate a corresponding PWM signal.

Abstract: An actuator of a camera module includes a magnetic body disposed on one side surface of a lens barrel, a driving coil, and a driving apparatus. The driving coil faces the magnetic body. The driving apparatus is configured to drive the driving coil in one of a linear driving scheme and a pulse width modulation (PWM) driving scheme based on an external illumination information in an illumination signal and move the lens barrel in a direction perpendicular to an optical axis direction.

Abstract: A digital-to-analog converter may include: a signal modulator configured to receive a signal having a first digital value, and modulate the signal having the first digital value to a signal having a second digital value having fewer bits than bits of the signal having the first digital value, or a signal having a value that is periodically changed between the second digital value and a value greater than the second digital value; and a signal converter configured to convert the signal having the second digital value into a signal having an analog value.

Abstract: There is provided an apparatus for testing an analog-to-digital converter including: an analog-to-digital converter converting an analog type signal into a digital type signal; a signal generator applying a predetermined type analog signal to the analog-to-digital converter; a first processor controlling the signal generator so that the analog signal is divided to be applied to the analog-to-digital converter; and a second processor determining error occurrence, determining a valid range, and calculating DNL and INL of output data of the analog-to-digital converter.

Abstract: An apparatus for correcting an image may include a first correction unit measuring movement of a camera module and a position of a lens in the camera module and adjusting the position of the lens in the camera module in accordance with the movement, and a second correction unit calculating error vectors using the measured movement value of the camera module and the position value of the lens and correcting an image from the camera module using the error vectors.

Abstract: An apparatus for correcting an image may include a first correction unit measuring movement of a camera module and a position of a lens in the camera module and adjusting the position of the lens in the camera module in accordance with the movement, and a second correction unit calculating error vectors using the measured movement value of the camera module and the position value of the lens and correcting an image from the camera module using the error vectors.

Abstract: There is provided an image feature extraction technology capable of more efficiently processing images by optimizing a scanning region of images. An image feature extraction apparatus includes an image size detecting unit detecting the overall size of an input image; an interest region detecting unit detecting at least one region of interest including objects present in the input image; and a control unit comparing a summed size of the at least one region of interest with the overall size of the input image to determine a scanning region in which feature extraction is to be formed.

Abstract: An apparatus and method for orthogonal frequency division multiplexing (OFDM) channel equalization are disclosed. The apparatus includes a compensation value setting unit setting a compensation value in the form of a diagonal matrix by use of a diagonal matrix of diagonal elements extracted from a channel matrix of an OFDM receiver, and a preset divergence suppression value, an initial estimation value calculation unit calculating an initial estimate value by use of a fast Fourier transform (FFT)-processed signal of the OFDM receiver and the compensation value, an equalization unit detecting a transmission signal to be processed by use of the compensation value, the channel matrix and the diagonal matrix, and a symbol decision unit determining a symbol for an adjacent signal of a transmission signal, which is to be processed among a plurality of signals output from the equalization unit, and providing the symbol-determined adjacent signal to the equalization unit.

Abstract: There are provided an apparatus for detecting coordinates, which may detect coordinates corresponding to an event occurring within a region of interest, and a display device, a security device, and an electronic blackboard, each including the same. The apparatus for detecting coordinates, which is provided in at least one side of a touch panel having a preset region of interest being surrounded by a frame having a predetermined length, the apparatus comprising: a light source body providing preset light; a scanner emitting the light provided from the light source body at a preset angle to scan the region of interest, and receiving light reflected by the region of interest; a photo diode receiving reflected light to convert the received reflected light to a voltage value; and a beam splitter transmitting the light provided from the light source body to the scanner via a first path, and transmitting, to the photo diode via a second path, the reflected light received from the scanner.

Abstract: An apparatus and method for orthogonal frequency division multiplexing (OFDM) channel equalization are disclosed. The apparatus includes a compensation value setting unit setting a compensation value in the form of a diagonal matrix by use of a diagonal matrix of diagonal elements extracted from a channel matrix of an OFDM receiver, and a preset divergence suppression value, an initial estimation value calculation unit calculating an initial estimate value by use of a fast Fourier transform (FFT)-processed signal of the OFDM receiver and the compensation value, an equalization unit detecting a transmission signal to be processed by use of the compensation value, the channel matrix and the diagonal matrix, and a symbol decision unit determining a symbol for an adjacent signal of a transmission signal, which is to be processed among a plurality of signals output from the equalization unit, and providing the symbol-determined adjacent signal to the equalization unit.