Abstract: A standard cell of an IC includes a cell area including a transistor configured to determine a function of the standard cell; a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in a first direction; and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. The active area includes a first active area and a second active area spaced apart from each other in a second direction perpendicular to the first direction and extend parallel to each other in the first direction. At least one of the first active area and the second active area provided in the first dummy area is biased, and at least one of the first active area and the second active area provided in the second dummy area is biased.

Abstract: A standard cell of an IC includes a cell area including a transistor configured to determine a function of the standard cell; a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in a first direction; and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. The active area includes a first active area and a second active area spaced apart from each other in a second direction perpendicular to the first direction and extend parallel to each other in the first direction. At least one of the first active area and the second active area provided in the first dummy area is biased, and at least one of the first active area and the second active area provided in the second dummy area is biased.

Abstract: An integrated circuit may include a first standard cell including first and second active regions extending in a first horizontal direction and a first gate line extending in a second horizontal direction orthogonal to the first horizontal direction; and a second standard cell including third and fourth active regions extending in the first horizontal direction and a second gate line aligned in parallel to the first gate in the second horizontal direction and being adjacent to the first standard cell. A distance between the second active region of the first standard cell and the third active region of the second standard cell may be greater than a distance between the first and second active regions of the first standard cell, and may be greater than a distance between the third and fourth active regions of the second standard cell.

Abstract: Provided is an integrated circuit including: at least one active region extending in a first row in a first direction; at least one active region extending in a second row in the first direction; and a multiple height cell including the at least one active region in the first row, the at least one active region in the second row, at least one gate line extending in a second direction crossing the first direction, wherein each of the at least one active region in the first row and the at least one active region in the second row is terminated by a diffusion break.

Abstract: A light-emitting device includes a light-emitting structure including a first-conductivity-type nitride semiconductor layer on a substrate, an active layer on the first-conductivity-type nitride semiconductor layer, and a second-conductivity-type nitride semiconductor layer on the active layer, and a buffer layer between the substrate and the light-emitting structure. The buffer layer includes a plurality of voids. The plurality of voids extend vertically into the buffer layer from a surface of the buffer layer. The surface of the buffer layer is proximate to the light-emitting structure. The plurality of voids have different horizontal sectional areas.

Abstract: A standard cell of an IC includes a cell area including a transistor configured to determine a function of the standard cell; a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in a first direction; and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. The active area includes a first active area and a second active area spaced apart from each other in a second direction perpendicular to the first direction and extend parallel to each other in the first direction. At least one of the first active area and the second active area provided in the first dummy area is biased, and at least one of the first active area and the second active area provided in the second dummy area is biased.

Abstract: An integrated circuit (IC) may include a plurality of standard cells. At least one standard cell of the plurality of standard cells may include a power rail configured to supply power to the at least one standard cell, the power rail extending in a first direction, a cell area including at least one transistor configured to determine a function of the at least one standard cell, a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in the first direction, and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. A region of the active area, which is included in the first dummy area or the second dummy area, is electrically connected to the power rail.

Abstract: An integrated circuit may include a first active region and a second active region, and the first and second active regions may extend on a substrate in a first horizontal direction in parallel to each other and have different conductivity types from each other. A first gate line may extend in a second horizontal direction crossing the first horizontal direction, and may form a first transistor with the first active region. The first transistor may include a gate to which a first input signal is applied. The first gate line may include a first partial gate line that overlaps the first active region in a perpendicular direction and that has an end on a region between the first and second active regions.

Abstract: A light-emitting device includes a light-emitting structure including a first-conductivity-type nitride semiconductor layer on a substrate, an active layer on the first-conductivity-type nitride semiconductor layer, and a second-conductivity-type nitride semiconductor layer on the active layer, and a buffer layer between the substrate and the light-emitting structure. The buffer layer includes a plurality of voids. The plurality of voids extend vertically into the buffer layer from a surface of the buffer layer. The surface of the buffer layer is proximate to the light-emitting structure. The plurality of voids have different horizontal sectional areas.

Abstract: An integrated circuit (IC) may include a plurality of standard cells. At least one standard cell of the plurality of standard cells may include a power rail configured to supply power to the at least one standard cell, the power rail extending in a first direction, a cell area including at least one transistor configured to determine a function of the at least one standard cell, a first dummy area and a second dummy area respectively adjacent to two sides of the cell area in the first direction, and an active area extending in the first direction across the cell area, the first dummy area, and the second dummy area. A region of the active area, which is included in the first dummy area or the second dummy area, is electrically connected to the power rail.

Abstract: A semiconductor light emitting device includes a substrate formed of a first material; and a convex portion protruding from the substrate and including: a first layer formed of the first material as that of the substrate; and a second layer formed of a second material different from the first material and disposed on the first layer. A second height of the second layer is greater than a first height of the first layer.

Abstract: A method of manufacturing a light emitting diode (LED) includes forming a first material layer on a substrate, forming a second material layer on the first material layer, forming a photomask pattern on the second material layer, performing a first etching on the second material layer and a portion of the first material layer by using the photomask pattern as an etch mask, removing the photomask pattern, and forming a plurality of isolated structures by performing a second etching on the remaining portion of the first material layer until a top surface of the substrate is exposed.

Abstract: A light-emitting device includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer and having a plurality of V-pits. The light-emitting device further includes a layer-quality improvement layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer and having a plurality of V-pits with substantially same size and shape as the plurality of V-pits of the active layer, wherein layer-quality improvement layer is a group III-V semiconductor layer including Al or In. Due to the improved layer quality, the luminescent quality of the light-emitting device is improved.

Abstract: A semiconductor light emitting device includes a substrate formed of a first material; and a convex portion protruding from the substrate and including: a first layer formed of the first material as that of the substrate; and a second layer formed of a second material different from the first material and disposed on the first layer. A second height of the second layer is greater than a first height of the first layer.

Abstract: A light-emitting device includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer and having a plurality of V-pits. The light-emitting device further includes a layer-quality improvement layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer and having a plurality of V-pits with substantially same size and shape as the plurality of V-pits of the active layer, wherein layer-quality improvement layer is a group III-V semiconductor layer including Al or In. Due to the improved layer quality, the luminescent quality of the light-emitting device is improved.

Abstract: A semiconductor light emitting device may include a base semiconductor layer formed on a substrate and having defect regions therein; cavities disposed in regions corresponding to the defect regions on the base semiconductor layer; a capping layer disposed to cover at least one region of the base semiconductor layer and the cavities; and a light emitting structure disposed on the capping layer and including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. Lattice defects formed in the light emitting structure may be reduced to enhance luminous efficiency.

Abstract: A method of manufacturing a nitride semiconductor light emitting device includes forming a first conductivity type nitride semiconductor layer. An active layer is formed on the first conductivity type nitride semiconductor layer. A second conductivity type nitride semiconductor layer is formed on the active layer. In the forming of the active layer, quantum well layers and quantum barrier layers are alternatively stacked and at least two dopant layers are formed inside of at least one of the quantum well layers. The dopant layers are doped with a dopant in a predetermined concentration.

Abstract: A semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer interposed between the n-type semiconductor layer and the p-type semiconductor layer. The p-type semiconductor layer includes a first impurity region including a p-type impurity and a second impurity region including an n-type impurity. The first and second impurity regions are alternately repeated at least once.

Abstract: There is provided a semiconductor light emitting device including: first and second conductivity type semiconductor layers; and an active layer disposed between the first and second conductivity type semiconductor layers and having a structure in which a plurality of quantum barrier layers and a plurality of quantum well layers are alternately disposed, wherein at least one of the plurality of quantum well layers includes a first region in which band gap energy is reduced through a first slope and a second region in which band gap energy is reduced through a second slope different from the first slope. The influence of polarization is minimized by adjusting the shape of the band gap of the quantum well layer, crystallinity and internal quantum efficiency can be enhanced.

Abstract: A nitride semiconductor light emitting device includes first and second type nitride semiconductor layers. An active layer is disposed between the first and second type nitride semiconductor layers. A current spreading layer is disposed between the second type nitride semiconductor layer and the active layer. The current spreading layer includes first nitride thin films and second nitride thin films which are alternately laminated. The first nitride thin films have band gaps larger than those of the second nitride thin films. A first plurality of first nitride thin films are positioned at outer first and second sides of the current spreading layer. The first plurality of first nitride thin films have a thickness greater than that of a second plurality of first nitride thin films positioned between the first plurality of first nitride thin films.