Patents by Inventor Jin-Yuan Chen

Jin-Yuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240095467
    Abstract: Translating applications to a target language includes extracting program integrated information (PII) to be translated and creating translation context datasets based on interpretation of accessibility information associated with particular strings of PII. Translation pairs include PII and corresponding context datasets for context-based translation of application components. A two-stage index contains PII strings for first stage lookup and context datasets for distinguishing duplicate PII strings as a second stage lookup. Real-time translation is facilitated by the two-stage index, which is established by translation pairs and resulting translations.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Inventors: CHIH-YUAN LIN, Jin Shi, Shu-Chih Chen, PEI-YI LIN, Chao Yuan Huang
  • Publication number: 20240069912
    Abstract: A method for identifying hard-coded strings in source code is disclosed. In one embodiment, such a method parses source code and associated localization resource files to identify hard-coded strings and their associated context. The method provides a confidence score for each hard-coded string that indicates whether the hard-coded string is translatable or non-translatable. Based on the confidence score for each hard-coded string, the method transforms each hard-coded string into a single equivalence word. The method then prepares training data by tagging the hard-coded strings in the source code and associated localization resource files as one of translatable and non-translatable. The method then trains a parts-of-speech (POS) tagging model using the training data. At runtime, the method fetches potential hard-coded strings and tags each hard-coded string as one of translatable and non-translatable using the POS tagging model. A corresponding system and computer program product are also disclosed.
    Type: Application
    Filed: August 27, 2022
    Publication date: February 29, 2024
    Applicant: International Business Machines Corporation
    Inventors: Jin Shi, Chih-Yuan Lin, Shu-Chih Chen, Pei-Yi Lin, Chao Yuan Huang
  • Publication number: 20070020937
    Abstract: A method and apparatus for selectively controlling a plasma in a processing chamber during wafer processing. The method includes providing process gasses into the chamber over a wafer to be processed, and providing high frequency RF power to a plasma generating element and igniting the process gases into the plasma. Modulated RF power is coupled to a biasing element, and wafer processing is performed according to a particular processing recipe. The apparatus includes a biasing element disposed in the chamber and adapted to support a wafer, and a plasma generating element disposed over the biasing element and wafer. A first power source is coupled to the plasma generating element, and a second power source is coupled to the biasing element. A third power source is coupled to the biasing element, wherein the second and third power sources provide a modulated signal to the biasing element.
    Type: Application
    Filed: August 9, 2006
    Publication date: January 25, 2007
    Inventors: Jin-Yuan Chen, Frank Hooshdaran, Dragan Podlesnik
  • Publication number: 20060175015
    Abstract: A method and apparatus for selectively controlling a plasma in a processing chamber during wafer processing. The method includes providing process gasses into the chamber over a wafer to be processed, and providing high frequency RF power to a plasma generating element and igniting the process gases into the plasma. Modulated RF power is coupled to a biasing element, and wafer processing is performed according to a particular processing recipe. The apparatus includes a biasing element disposed in the chamber and adapted to support a wafer, and a plasma generating element disposed over the biasing element and wafer. A first power source is coupled to the plasma generating element, and a second power source is coupled to the biasing element. A third power source is coupled to the biasing element, wherein the second and third power sources provide a modulated signal to the biasing element.
    Type: Application
    Filed: March 14, 2006
    Publication date: August 10, 2006
    Inventors: Jin-Yuan Chen, Frank Hooshdaran, Dragan Podlesnik
  • Publication number: 20040025791
    Abstract: A method and apparatus for selectively controlling a plasma in a processing chamber during wafer processing. The method includes providing process gasses into the chamber over a wafer to be processed, and providing high frequency RF power to a plasma generating element and igniting the process gases into the plasma. Modulated RF power is coupled to a biasing element, and wafer processing is performed according to a particular processing recipe. The apparatus includes a biasing element disposed in the chamber and adapted to support a wafer, and a plasma generating element disposed over the biasing element and wafer. A first power source is coupled to the plasma generating element, and a second power source is coupled to the biasing element. A third power source is coupled to the biasing element, wherein the second and third power sources provide a modulated signal to the biasing element.
    Type: Application
    Filed: January 14, 2003
    Publication date: February 12, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Jin-Yuan Chen, Frank F. Hooshdaran, Dragan V. Podlesnik
  • Publication number: 20040027209
    Abstract: A matching network for performing frequency tuned matching between a source and a load. The matching network includes a first capacitor and first inductor, having fixed values, coupled in series from an input port to an output port. A second capacitor and second inductor, having fixed values, is coupled in series from one of the input port and output port to ground. The input port is adapted to receive a variable frequency RF signal and the output port is adapted to be coupled to a time-variant load impedance. The values of the first inductor and first capacitor are related by a first mathematical relationship, and the values of the second inductor and second capacitor are related by a second mathematical relationship. The substantial impedance range of the matching network enables a match to be maintained over a large fluctuation in load impedance.
    Type: Application
    Filed: March 3, 2003
    Publication date: February 12, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Jin-Yuan Chen, Frank F. Hooshdaran, Doug S. Jun
  • Publication number: 20030006009
    Abstract: The present invention provides a process chamber and voltage distributive electrode (VDE) which distributes capacitive coupling between an inductive source and a plasma in a process chamber. The VDE is preferably slotted defining energy opaque and energy transparent portions which enable inductive coupling into the chamber while distributing capacitive coupling uniformly over the dielectric window.
    Type: Application
    Filed: August 30, 2002
    Publication date: January 9, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Valentin N. Todorov, Robert E. Ryan, Arthur Sato, Jin-Yuan Chen, Xueyu Qian, Zhiwen Sun
  • Publication number: 20030003748
    Abstract: We have found that by applying pulsed bias power to a substrate support electrode in an etch chamber, anisotropic etching of silicon over an insulator layer can be carried out with a minimum of notching at the silicon-insulator interface and with improved uniformity of etching across the substrate.
    Type: Application
    Filed: May 24, 2001
    Publication date: January 2, 2003
    Inventors: Anisul Khan, Ajay Kumar, Yiqiong Wang, Jin-Yuan Chen, Arthur H. Sato
  • Patent number: 6472822
    Abstract: A system and method for overcoming the above-described problems relating to the delivery of pulsed RF power to a plasma processing chamber. The power reflected from the chamber is reduced using one or more of the following techniques: (1) varying the RF frequency within a pulse period; (2) ramping up the pulse heights at the leading edge of the pulse train; (3) simultaneously transmitting a relatively low CW signal along with the pulsed signal; and (4) rapidly switching the shunt capacitance within a local matching network within a pulse period. The amount of power delivered to the plasma by the pulses is measured by way of a time-averaging mechanism coupled to a directional coupler connected to the transmission line. The time-averaging mechanism may comprise circuitry to measure temperatures of loads attached to the directional coupler, or analog integrating circuitry attached to the directional coupler, or digital integrating circuitry attached to the directional coupler.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: October 29, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Jin-Yuan Chen, John P. Holland, Arthur H. Sato, Valentin N. Todorow
  • Patent number: 6447637
    Abstract: The present invention provides a process chamber and voltage distributive electrode (VDE) which distributes capacitive coupling between an inductive source and a plasma in a process chamber. The VDE is preferably slotted defining energy opaque and energy transparent portions which enable inductive coupling into the chamber while distributing capacitive coupling uniformly over the dielectric window.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: September 10, 2002
    Assignee: Applied Materials Inc.
    Inventors: Valentin N. Todorov, Robert E. Ryan, Arthur Sato, Jin-Yuan Chen, Xueyu Qian, Zhiwen Sun