Patents by Inventor Jin Zhao

Jin Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7524777
    Abstract: The invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among others, may include forming one or more layers of material within an opening in a substrate, the opening and the one or more layers forming at least a portion of an isolation structure, and subjecting at least one of the one or more layers to an energy beam treatment, the energy beam treatment configured to change a stress of the one or more layers subjected thereto, and thus change a stress in the substrate.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: April 28, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Puneet Kohli, Manoj Mehrotra, Jin Zhao, Sameer Ajmera
  • Publication number: 20090099048
    Abstract: The functional fluids of the present invention comprise about 50 parts by weight to about 99 parts by weight of a glycol component and about 0.3 parts by weight to about 10 parts by weight of one or more additives including a phosphate content. Desirably, in one aspect of this invention, the functional fluid composition exhibits an average scar width according to ASTM D 2670 (100 lb break-in for 1 min, 200 lb load for 30 minutes) that ranges from about 0.05 mm to about 0.45 mm, an average tooth count according to ASTM D 2670 (100 lb break-in for 1 min, 200 lb load for 30 minutes) of less than about 15, or both.
    Type: Application
    Filed: October 10, 2008
    Publication date: April 16, 2009
    Applicant: Dow Global Technologies Inc.
    Inventors: Jin Zhao, Kenn L. Bouchard, Tina M. Killebrew
  • Publication number: 20090088349
    Abstract: The fluid compositions of the present invention include an glycol component that includes a mixture of glycols according the formula: Wherein, typically, at least one of R2, R3, R4 and R5 is an alkyl group. The physical properties of the compositions include a high dry equilibrium reflux boiling point (ERBP), a high wet equilibrium reflux boiling point (WERBP), a low temperature viscosity or any combination thereof. These compositions are particularly useful because their physical properties (e.g., WERBP, ERBP, and low temperature viscosity) meet or exceed the provisions for DOT 3, 4, or 5 brake fluids.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicant: Dow Global Technologies Inc.
    Inventors: Jin Zhao, Kenn L. Bouchard, Tina M. Killebrew
  • Patent number: 7465635
    Abstract: The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among other steps, may include forming a gate structure over a substrate, forming at least a portion of gate sidewall spacers proximate sidewalls of the gate structure, and subjecting the at least a portion of the gate sidewall spacers to an energy beam treatment, the energy beam treatment configured to change a stress of the at least a portion of the gate sidewall spacers, and thus change a stress in the substrate therebelow.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: December 16, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Puneet Kohli, Manoj Mehrotra, Jin Zhao, Sameer Ajmera
  • Patent number: 7423344
    Abstract: A method of forming a film stack in an integrated circuit, said method comprising depositing a layer of silicon carbide adjacent a first layer of dielectric material, depositing a layer of silicon nitride adjacent the layer of silicon carbide, and depositing a second layer of dielectric material adjacent the layer of silicon nitride.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: September 9, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Tae S. Kim, Jin Zhao, Nathan J. Kruse, August J. Fischer, Ralf B. Willecke
  • Publication number: 20080157264
    Abstract: One embodiment of the present invention relates to a method of forming an isolation structure. During this method, an isolation trench is formed within a semiconductor body. After this trench is formed, it is filled by performing multiple high-frequency plasma depositions to deposit multiple dielectric layers over the semiconductor body. A first of the multiple layers is deposited at a high-frequency power of between approximately 100 watts and approximately 900 watts.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 3, 2008
    Inventors: Jin Zhao, Manuel Quevedo-Lopez, Louis H. Breaux
  • Publication number: 20080146043
    Abstract: The invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among others, may include forming one or more layers of material within an opening in a substrate, the opening and the one or more layers forming at least a portion of an isolation structure, and subjecting at least one of the one or more layers to an energy beam treatment, the energy beam treatment configured to change a stress of the one or more layers subjected thereto, and thus change a stress in the substrate.
    Type: Application
    Filed: December 14, 2006
    Publication date: June 19, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Puneet Kohli, Manoj Mehrotra, Jin Zhao, Sameer Ajmera
  • Publication number: 20080076227
    Abstract: The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device includes, among other steps, forming a gate structure over a substrate, the gate structure having source/drain regions proximate thereto and in, on or over the substrate, forming a pre-metal dielectric layer over the gate structure and source/drain regions, and subjecting the pre-metal dielectric layer to an energy beam treatment, the energy beam treatment configured to change a stress of the pre-metal dielectric layer, and thus change a stress in the substrate therebelow.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 27, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Puneet Kohli, Manoj Mehrotra, Jin Zhao, Sameer Ajmera
  • Publication number: 20080076225
    Abstract: The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among other steps, may include forming a gate structure over a substrate, forming at least a portion of gate sidewall spacers proximate sidewalls of the gate structure, and subjecting the at least a portion of the gate sidewall spacers to an energy beam treatment, the energy beam treatment configured to change a stress of the at least a portion of the gate sidewall spacers, and thus change a stress in the substrate therebelow.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 27, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Puneet Kohli, Manoj Mehrotra, Jin Zhao, Sameer Ajmera
  • Publication number: 20070213339
    Abstract: Quinolone carboxylic acid derivatives of formula (I) wherein Ar is an optionally substituted phenyl, pyridyl, or pyrimidinyl group and the substituent groups R1, R4, R10, R11, R19, and R20 are as defined in the specification, pharmaceutical compositions containing them, and methods of using them in treatment of hyperproliferative diseases such as cancer are disclosed and claimed.
    Type: Application
    Filed: March 31, 2005
    Publication date: September 13, 2007
    Applicant: Bayer Pharmaceuticals Corporation
    Inventors: Uday Khire, Xiao-Gao Liu, Dhanapalan Nagarathnam, Jill Wood, Lei Wang, Donglei Liu, Jin Zhao, Leatte Guernon, Lei Zhang
  • Publication number: 20070134918
    Abstract: A method of forming a film stack in an integrated circuit, said method comprising depositing a layer of silicon carbide adjacent a first layer of dielectric material, depositing a layer of silicon nitride adjacent the layer of silicon carbide, and depositing a second layer of dielectric material adjacent the layer of silicon nitride.
    Type: Application
    Filed: February 26, 2007
    Publication date: June 14, 2007
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tae Kim, Jin Zhao, Nathan Kruse, August Fischer, Ralf Willecke
  • Patent number: 7199047
    Abstract: A method of forming a film stack in an integrated circuit, said method comprising depositing a layer of silicon carbide adjacent a first layer of dielectric material, depositing a layer of silicon nitride adjacent the layer of silicon carbide, and depositing a second layer of dielectric material adjacent the layer of silicon nitride.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Tae S. Kim, Jin Zhao, Nathan J. Kruse, August J. Fischer, Ralf B. Willecke
  • Publication number: 20060254515
    Abstract: The present invention provides, in one embodiment, a process for cleaning a deposition chamber (100). The process includes a step (100) of forming a reactive plasma cleaning zone by dissociating a gaseous fluorocompound introduced into a deposition chamber having an interior surface and in a presence of a plasma. The process (100) further includes a step (120) of ramping a flow rate of said gaseous fluorocompound to move the reactive plasma cleaning zone throughout the deposition chamber, thereby preventing a build-up of localized metal compound deposits on the interior surface. Other embodiments advantageously incorporate the process (100) into a system (200) for cleaning a deposition chamber (205) and a method of manufacturing semiconductor devices (300).
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ignacio Blanco, Jin Zhao, Nathan Kruse
  • Publication number: 20060254614
    Abstract: The present invention provides, in one embodiment, a process for cleaning a deposition chamber (100). The process includes a step (100) of forming a reactive plasma cleaning zone by dissociating a gaseous fluorocompound introduced into a deposition chamber having an interior surface and in a presence of a plasma. The process (100) further includes a step (120) of ramping a flow rate of said gaseous fluorocompound to move the reactive plasma cleaning zone throughout the deposition chamber, thereby preventing a build-up of localized metal compound deposits on the interior surface. Other embodiments advantageously incorporate the process (100) into a system (200) for cleaning a deposition chamber (205) and a method of manufacturing semiconductor devices (300).
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ignacio Blanco, Jin Zhao, Nathan Kruse
  • Publication number: 20060228867
    Abstract: A method (10) of forming an isolation structure (140, 142) in a semiconductor substrate (102) is disclosed, wherein the isolation structure (140, 142) can be formed in a controlled manner so as to regulate stresses exerted by the structure on one or more active regions (106) of the substrate (102) located adjacent to the structure (140, 142).
    Type: Application
    Filed: April 12, 2005
    Publication date: October 12, 2006
    Inventors: Manoj Mehrotra, Amitava Chatterjee, Jin Zhao
  • Patent number: 7112546
    Abstract: The present invention provides, in one embodiment, a method of manufacturing semiconductor devices. The method comprises transferring one or more substrate into a deposition chamber and depositing material layers on the substrate. The chamber has an interior surface. The method further includes, between the transfers, cleaning the deposition chamber using an in situ ramped cleaning process when material layer deposits in the deposition chamber reaches a predefined thickness. The in situ ramped cleaning process comprises forming a reactive plasma cleaning zone by dissociating a gaseous fluorocompound introduced into a deposition chamber in a presence of a plasma. The cleaning process further includes ramping a flow rate of the gaseous fluorocompound in a presence of the plasma to move the reactive plasma cleaning zone throughout the deposition chamber, thereby preventing a build-up of localized metal compound deposits on the interior surface.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: September 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Ignacio Blanco, Jin Zhao, Nathan Kruse
  • Publication number: 20060165784
    Abstract: A dissoluble oral tablet of calcium supplement and the method of making the product are provided. This calcium supplement comprises an exposure area and a coating covered area. The surface ratio between the exposure area and the coating covered area is about 1:1 to 1:12. The exposure area can be a hole, an opening, or their combination. The preferred samples contain about CaCO3 200-600 mg with MgCL2 50-150 mg or MgSO4 50-100 mg. The favorable CaCO3 tablet reaction with stomach acid is: CaCO3+2HCL=CaCL2+H2CO3=Ca+++2CL?+H2O+CO2 ?. The CO2 is the natural bubble broker. The stomach HCL is the natural CaCL2 maker.
    Type: Application
    Filed: March 17, 2005
    Publication date: July 27, 2006
    Inventor: Jin Zhao
  • Patent number: 7020526
    Abstract: A non-invasive percutaneously acting apparatus for relieving constipation or diarrhea and appropriately stimulating peristaltic movement in the human gastro-intestinal (GI) tract. The apparatus includes an annular or toroidal shaped hollow housing having a working surface on one side thereof. A multi-point electrode generally coextensive with the working surface includes a plurality of point electrodes each separately mounted in and preferably biasingly moveably extend outwardly from the working surface. A d.c. pulse generator selectively and sequentially connectable to the point electrodes whereby, when the working surface is positioned against or in close proximity to the skin over the GI tract, the point electrodes deliver electrical pulses percutaneously and sequentially moving from one point electrode to the next adjacent point electrode repeatedly around the working surface.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: March 28, 2006
    Inventor: Ruan Jin Zhao
  • Patent number: 6998275
    Abstract: The present invention is directed to a method of forming a diffusion barrier layer for a FeRAM capacitor, which includes depositing a chemical vapor deposited titanium nitride layer in a via, and treating the chemical vapor deposited titanium nitride layer using a plasma treatment substantially excluding hydrogen.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: February 14, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Jin Zhao, M. Grant Albrecht, Qidu Jiang, Linlin Chen
  • Patent number: 6999319
    Abstract: A support frame structure mounted inside the housing of a computer system for supporting electronic drives is disclosed to include a plurality of upright partition plates affixed to the bottom panel between two upright side panels of the housing, a cover plate fastened to the upright side panels of the housing and covered on the upright partition plates, and a detachable upright back panel, which has a bottom side engaged into notched locating strips at the back side of each upright partition plate and a top side terminating in a forwardly extended bend, which is covered on a rear part of the top of each upright partition plate and affixed thereto with a screw.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: February 14, 2006
    Assignee: Tatung Co., Ltd.
    Inventors: Chia-Kang Wu, Zheng-Jin Zhao, Fu-Jung Hsui