Patents by Inventor Jin Zhu Lee

Jin Zhu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Test assembly for integrated circuit package
    Patent number: 6788092
    Abstract: A test assembly for an integrated circuit package includes a package substrate and a test board. The package substrate is provided with a plurality of first contact pads linked in a first daisy chain pattern. The test board has a plurality of second contact pads linked in a second daisy chain pattern and a plurality of test pads. All of the second contact pads are divided into a plurality of groups each connected to one pair of test pads. All of the second contact pads in any group are arranged in a line. The present invention further provides a method of testing an integrated circuit package utilizing the aforementioned package substrate and test board.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: September 7, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Po Jen Cheng, Chiu Wen Lee, Jin Zhu Lee, Heng Yu Kung
  • Test assembly for integrated circuit package
    Publication number: 20040155241
    Abstract: A test assembly for an integrated circuit package includes a package substrate and a test board. The package substrate is provided with a plurality of first contact pads linked in a first daisy chain pattern. The test board has a plurality of second contact pads linked in a second daisy chain pattern and a plurality of test pads. All of the second contact pads are divided into a plurality of groups each connected to one pair of test pads. All of the second contact pads in any group are arranged in a line. The present invention further provides a method of testing an integrated circuit package utilizing the aforementioned package substrate and test board.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po Jen Cheng, Chiu Wen Lee, Jin Zhu Lee, Heng Yu Kung
  • Test assembly for integrated circuit package
    Publication number: 20030193344
    Abstract: A test assembly for an integrated circuit package includes a package substrate and a test board. The package substrate is provided with a plurality of first contact pads linked in a first daisy chain pattern. The test board has a plurality of second contact pads linked in a second daisy chain pattern and a plurality of test pads. All of the second contact pads are divided into a plurality of groups each connected to one pair of test pads. All of the second contact pads in any group are arranged in a line. The present invention further provides a method of testing an integrated circuit package utilizing the aforementioned package substrate and test board.
    Type: Application
    Filed: April 15, 2002
    Publication date: October 16, 2003
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po Jen Cheng, Chiu Wen Lee, Jin Zhu Lee, Heng Yu Kung