Abstract: A semiconductor device includes a semiconductor substrate having first and second regions therein, a first lower semiconductor pattern, which protrudes from the semiconductor substrate in the first region and extends in a first direction across the semiconductor substrate, and a first gate electrode, which extends across the first lower semiconductor pattern and the semiconductor substrate in a second direction. A plurality of semiconductor sheet patterns are provided, which are spaced apart from each other in a third direction to thereby define a vertical stack of semiconductor sheet patterns, on the first lower semiconductor pattern. A first gate insulating film is provided, which separates the plurality of semiconductor sheet patterns from the first gate electrode. A second lower semiconductor pattern is provided, which protrudes from the semiconductor substrate in the second region. A plurality of wire patterns are provided, which are spaced apart from each other on the second lower semiconductor pattern.

Abstract: A semiconductor device includes a lower pattern extending in a first direction, a plurality of wire patterns spaced apart from the lower pattern in a second direction on the lower pattern, and a gate electrode surrounding the plurality of wire patterns and extending in a third direction, on the lower pattern. Each of the plurality of wire patterns includes a transition metal dichalcogenide (TMD) material. Each of the plurality of wire patterns includes a pair of first areas protruding from sidewalls of the gate electrode in the first direction and a second area between the first areas. A phase of the first area is different from a phase of the second area.

Abstract: A semiconductor device includes: a substrate, an active pattern extending in a first horizontal direction on the substrate, a plurality of nanosheets spaced apart from each other and stacked in a vertical direction on the active pattern, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region disposed on at least one side of the gate electrode on the active pattern, the source/drain region including a first layer doped with a metal, and a second layer disposed on the first layer, and an inner spacer disposed between the gate electrode and the first layer, between each of the plurality of nanosheets, the inner spacer in contact with the first layer, the inner spacer including a metal oxide formed by oxidizing the same material as the metal.

Abstract: A semiconductor device includes a substrate. An active pattern extends in a first horizontal direction on the substrate. First to third nanosheets are sequentially spaced apart from each other in a vertical direction on the active pattern. A gate electrode extends in a second horizontal direction on the active pattern and surrounds the first to third nanosheets. A source/drain region includes a first layer disposed along side walls and a bottom surface of a source/drain trench and a second layer filling the source/drain trench. The second layer includes a first lower side wall facing a side wall of the first nanosheet and an opposite second lower side wall. A lower surface connects the first and second lower side walls and extends in the first horizontal direction. The first and second lower side walls of the second layer extend to have a constant slope in opposite directions to each other.

Abstract: A semiconductor device may include a substrate, an active pattern extended in a first horizontal direction on the substrate, a plurality of nanosheets stacked and spaced apart from each other in a vertical direction on the active pattern, a gate electrode extended in a second horizontal direction different from the first horizontal direction on the active pattern, the gate electrode surrounding the plurality of nanosheets, a source/drain region on both sides of the plurality of nanosheets in the first horizontal direction on the active pattern, a gate insulating layer between the plurality of nanosheets and the gate electrode, and a doping layer between the plurality of nanosheets and the gate insulating layer, the doping layer including silicon (Si) or silicon germanium (SiGe) and doped with a doping material, at least a portion of the doping layer overlapping an uppermost nanosheet of the plurality of nanosheets in the first horizontal direction.

Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate including a first side and a second side opposite to the first side; an active pattern that is on the first side and extends in a first direction; an etch stop layer that extends along the first side of the substrate and does not extend along side faces of the active pattern; a field insulating film that is on the first side and covers at least a part of the side faces of the active pattern; a gate structure that extends in a second direction intersecting the first direction on the active pattern and the field insulating film; a through contact that extends in a third direction intersecting the first direction and the second direction and penetrates the field insulating film and the etch stop layer; a buried pattern connected to the through contact, inside the substrate; and a backside wiring structure that is on the second side and electrically connected to the buried pattern.

Abstract: A method for manufacturing a semiconductor device includes providing a buffer substrate, forming a sacrificial contact film on the buffer substrate, forming a sacrificial contact pattern by patterning the sacrificial contact film, forming a first base layer on the buffer substrate that surrounds the sacrificial contact pattern, forming an active pattern on the first base layer and the sacrificial contact pattern that extends in a first direction, forming a gate electrode on the active pattern extending in a second direction intersecting the first direction, forming a source/drain pattern on a side surface of the gate electrode for connection to the active pattern. The source/drain pattern overlaps the sacrificial contact pattern in a third direction intersecting the first and second directions. The sacrificial contact pattern is exposed by removing the buffer substrate. A lower source/drain contact is formed for connection to the source/drain pattern by replacing the exposed sacrificial contact pattern.

Abstract: Provided is a distributed and associative container platform system which has an advantage of providing flexible movement of services and infinite extension of computing resources by interconnecting regionally distributed multiple container platforms and enhancing security.

Abstract: A semiconductor device includes: an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern; a gate structure disposed on the lower pattern; and a source/drain pattern disposed on the lower pattern, and connected to each of the plurality of sheet patterns, wherein the plurality of sheet patterns include a first sheet pattern and a second sheet pattern. The second sheet pattern is disposed between the first sheet pattern and the lower pattern. A first upper width of an upper surface of the first sheet pattern is greater than a first lower width of a bottom surface of the first sheet pattern, and a second upper width of an upper surface of the second sheet pattern is smaller than a second lower width of a bottom surface of the second sheet pattern.

Abstract: A semiconductor device includes an active pattern including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction. The sheet patterns include an uppermost sheet pattern and a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction. Each of the plurality of gate structures includes a gate electrode and a gate insulating film and a source/drain pattern between adjacent ones of the plurality of gate structures. Each of inner gate structures includes a gate electrode and a gate insulating film. A semiconductor liner film includes silicon-germanium, and contacts the gate insulating film of each of the inner gate structures. A portion of the semiconductor liner film protrudes upwardly in the first direction beyond an upper surface of the uppermost sheet pattern.

Abstract: A semiconductor device includes a lower pattern on a substrate and protruding in a first direction, a source/drain pattern on the lower pattern and including a semiconductor liner film in contact with the lower pattern, and an epitaxial insulating liner extending along at least a portion of a sidewall of the semiconductor liner film, wherein the epitaxial insulating liner is in contact with the semiconductor liner film, wherein the semiconductor liner film includes a first portion, wherein the first portion of the semiconductor liner film includes a first point spaced apart from the lower pattern at a first height, and a second point spaced apart from the lower pattern at a second height, wherein the second height is greater than the first height, wherein a width of the semiconductor liner film in a second direction at the first point is less than a width of the semiconductor liner film in the second direction at the second point, and wherein the epitaxial insulating liner extends along at least a portion of

Abstract: There is provided a semiconductor device including an active pattern which includes a lower pattern extending in a first direction and a plurality of sheet patterns spaced apart from the lower pattern in a second direction on a substrate, the lower pattern including a protruding pattern protruding from the substrate in the second direction, and a capping pattern being in contact with the protruding pattern on the protruding pattern, a first gate structure and a second gate structure which are disposed on the lower pattern and spaced apart from each other in the first direction, and a source/drain pattern which is disposed on the lower pattern and in contact with the sheet pattern, wherein a thickness of the capping pattern in a portion that overlaps the first gate structure is different from a thickness of the capping pattern in a portion that overlaps the second gate structure.

Abstract: A semiconductor device having improved performance and reliability. The semiconductor device may include a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction. A plurality of gate structures may be on the lower pattern and spaced apart in the first direction, and a source/drain pattern, which may include a semiconductor liner film and a semiconductor filling film on the semiconductor liner film. A liner recess that is defined by an inner surface of the semiconductor liner film may include a plurality of width extension regions, and a width of each width extension region in the first direction may increase and then decreases, as a distance increases in the second direction from an upper surface of the lower pattern.

Abstract: A semiconductor device includes a lower pattern extending in a first direction, a first blocking structure which is on the lower pattern and includes at least one first blocking film comprising an oxygen-doped crystalline silicon film, a source/drain pattern on the first blocking structure, and a gate structure which extends in a second direction on the lower pattern and includes a gate electrode and a gate insulating film. Related fabrication methods are also discussed.

Abstract: A semiconductor device includes a substrate; an active pattern disposed on the substrate and extending in a first direction; a plurality of gate structures, wherein the plurality of gate structures is disposed on the active pattern and arranged in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, and wherein the gate electrode extends in a second direction; a source/drain pattern disposed between adjacent gate structures of the plurality of gate structures; a source/drain contact connected to the source/drain pattern; and a contact silicide film disposed between the source/drain pattern and the source/drain contact, wherein the contact silicide film includes a bowl region that wraps a lower portion of the source/drain contact, and a protruding region that protrudes from the bowl region of the contact silicide film.

Abstract: A semiconductor device includes a lower pattern extending in a first direction, and protruding from a substrate in a second direction, a lower insulating pattern on the lower pattern, and in contact with an upper surface of the lower pattern, a channel pattern on the lower insulating pattern, a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, and a source/drain pattern disposed on the lower pattern, and connected to the channel pattern. A vertical level of a lowermost portion of the source/drain pattern is lower than a vertical level of a bottom surface of the lower insulating pattern. The gate electrode overlaps the lower insulating pattern in the second direction.

Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.

Abstract: A semiconductor device includes a substrate, a gate electrode on the substrate, a gate spacer on a sidewall of the gate electrode, an active pattern penetrating the gate electrode and the gate spacer, and an epitaxial pattern contacting the active pattern and the gate spacer. The gate electrode extends in a first direction. The gate spacer includes a semiconductor material layer. The active pattern extends in a second direction crossing the first direction.