Abstract: A memory device, memory system, and a method of operating the same are provided. The method for operating the memory device, includes storing first page data in a cache latch, storing the first page data in a first data latch and storing last page data in a second data latch, programming memory cells of a first page of a memory array with the first page data, storing the first page data in the second data latch and storing second page data in the first data latch, and programming memory cells of a second page with a second page data.

Abstract: The present disclosure provides a method for controlling bit line voltages in a three-dimensional memory device. The method includes ramping up a bit line clamp regulation voltage and a control signal regulation voltage. The method also includes ramping up a bit line clamp enabling voltage and a control signal enabling voltage. The method also includes increasing a bit line clamp voltage in one stage, and increasing a control signal voltage in two stages. The method also includes decreasing the control signal voltage. The method also includes ramping down the bit line clamp enabling voltage, the bit line clamp regulation voltage, the control signal enabling voltage, and the control signal regulation voltage. The method further includes decreasing the bit line clamp voltage.

Abstract: Example memory devices, memory systems, and methods for reducing program disturb in NAND flash memory are disclosed. One example method includes applying, at a first time, a first voltage to a first select line coupled to a first select gate transistor, where the memory device includes a memory cell array. The memory cell array includes a memory string. The memory string includes the first select gate transistor, multiple memory cells, and a source select gate transistor. The multiple memory cells are positioned between the first select gate transistor and the source select gate transistor. The source select gate transistor is coupled to a source line of the memory cell array. A second voltage is applied at a second time to the first select line, where the second time is after the first time, and the second voltage is larger than the first voltage.

Abstract: In certain aspects, a method for programming a memory device includes caching first program data and preparing first program information, performing a first program operation using the first program data and the first program information, during the first program operation, caching a second program data in a first cache latch and preparing second program information, and after the first program operation is completed, performing a second program operation using the second program data and the second program information.

Abstract: An active acoustic system includes a thin-film sheet having an array of piezoelectric microstructures embossed in the film. Each piezoelectric microstructure may act as a speaker and/or a microphone. A control circuit is configured to individually address the piezoelectric microstructures to provide a separate voltage signal to, or receive a separate voltage signal from, each piezoelectric microstructure.

Abstract: An active acoustic system includes a thin-film sheet having an array of piezoelectric microstructures embossed in the film. Each piezoelectric microstructure may act as a speaker and/or a microphone. A control circuit is configured to individually address the piezoelectric microstructures to provide a separate voltage signal to, or receive a separate voltage signal from, each piezoelectric microstructure.

Abstract: An active acoustic system includes a thin-film sheet having an array of piezoelectric microstructures embossed in the film. Each piezoelectric microstructure may act as a speaker and/or a microphone. A control circuit is configured to individually address the piezoelectric microstructures to provide a separate voltage signal to, or receive a separate voltage signal from, each piezoelectric microstructure.

Abstract: Described embodiments provide an electromechanical transducer including a mechanically compliant, elastically deformable array of dielectric shells. A first electrically conductive electrode is disposed on a first surface of the array. A second electrically conductive electrode is disposed on a second surface of the array, where the second surface opposes the first surface. The array is configured to be mechanically compliant and elastically deformable in response to one or more incident forces applied to the electromechanical transducer.