Patents by Inventor Jindi Zhang

Jindi Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240116821
    Abstract: A preparation method of a high-thermal-conductivity and net-size silicon nitride ceramic substrate includes the following steps: (1) mixing an original powder, a sintering aid, a dispersant, a defoamer, a binder, and a plasticizer in a protective atmosphere to allow vacuum degassing to obtain a mixed slurry; (2) subjecting the mixed slurry to tape casting and drying in a nitrogen atmosphere to obtain a first green body; (3) subjecting the first green body to shaping pretreatment to obtain a second green body; (4) subjecting the second green body to debonding at 500° C. to 900° C. to obtain a third green body; and (5) subjecting the third green body to gas pressure sintering in a nitrogen atmosphere at 1,800° C. to 2,000° C. to obtain the high-thermal-conductivity and net-size silicon nitride ceramic substrate.
    Type: Application
    Filed: January 17, 2022
    Publication date: April 11, 2024
    Applicant: SHANGHAI INSTITUTE OF CERAMICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Hui ZHANG, Xuejian LIU, Jindi JIANG, Xiumin YAO, Zhengren HUANG, Zhongming CHEN
  • Publication number: 20240076243
    Abstract: The present disclosure relates to a method for preparing a silicon nitride ceramic material. The method including: (1) with at least one of silicon powder and silicon nitride powder as original powder and Y2O3 powder and MgO powder as sintering aids, the original powder and the sintering aids are mixed in a protective atmosphere, and the mixture is formed into a green body; (2) the resulting green body is put into a reducing atmosphere and pretreated at 500° C. to 800° C. to obtain a biscuit; and the reducing atmosphere is a hydrogen/nitrogen mixed atmosphere with a hydrogen content not higher than 5%; (3) the resulting biscuit is put into a nitrogen atmosphere and subjected to low-temperature heat treatment at 1600° C. to 1800° C. and high-temperature heat treatment at 1800° C. to 2000° C. in sequence.
    Type: Application
    Filed: January 17, 2022
    Publication date: March 7, 2024
    Inventors: Xuejian LIU, Hui ZHANG, Zhengren HUANG, Xiumin YAO, Jindi JIANG, Zhongming CHEN
  • Publication number: 20240067576
    Abstract: The present disclosure relates to a batch sintering method for a high-property silicon nitride ceramic substrate. The batch sintering method includes: (1) silicon nitride ceramic substrate green bodies are stacked and put into a boron nitride crucible, and a layer of boron nitride powder is applied between adjacent silicon nitride ceramic substrate green bodies; (2) after step-by-step vacuumization, debinding is performed in a nitrogen atmosphere or a reducing atmosphere at 500° C. to 900° C.; (3) gas pressure sintering is then performed in a nitrogen atmosphere at 1800° C. to 2000° C., completing the batch preparation of the high-property silicon nitride ceramic substrate.
    Type: Application
    Filed: January 17, 2022
    Publication date: February 29, 2024
    Inventors: Hui ZHANG, Xuejian LIU, Jindi JIANG, Xiumin YAO, Zhengren HUANG, Zhongming CHEN, Jian HUANG
  • Publication number: 20240067577
    Abstract: A preparation method for a copper plate-covered silicon nitride ceramic substrate is provided. The structure of the copper plate-covered silicon nitride ceramic substrate includes a silicon nitride ceramic substrate, copper sheets disposed on the upper and lower sides of the silicon nitride ceramic substrate and soldering layers disposed between the copper sheets and the silicon nitride ceramic substrate; the composition of the silicon nitride ceramic substrate comprises a silicon nitride phase (more than or equal to 95 wt %); and a grain boundary phase (containing at least three elements (Y, Mg and O) and less than or equal to 5 wt %, and the content of a crystalline phase in the grain boundary phase is more than or equal to 40 vol %); and the sintering aids are Y2O3 and MgO. The two-step sintering process comprises: in a nitrogen atmosphere, performing low-temperature heat treatment and high-temperature heat treatment in sequence.
    Type: Application
    Filed: January 17, 2022
    Publication date: February 29, 2024
    Inventors: Xuejian LIU, Hui ZHANG, Xiumin YAO, Yan LIU, Jindi JIANG, Zhengren HUANG, Zhongming CHEN
  • Publication number: 20240009841
    Abstract: A dynamic target tracking method for a robot having multiple joints includes: obtaining a motion state of a tracked dynamic target in real time; performing motion prediction according to the motion state at a current moment to obtain a predicted position of the dynamic target; performing lag compensation on the predicted position to obtain a compensated predicted position; performing on-line trajectory planning according to the compensated predicted position to obtain planning quantities of multi-step joint motion states at multiple future moments, and determining a multi-step optimization trajectory according to the planning quantities and a multi-step optimization objective function; and controlling the joints of the robot to according to the multi-step optimization trajectory.
    Type: Application
    Filed: July 3, 2023
    Publication date: January 11, 2024
    Inventors: Jindi Zhang, Youjun Xiang, Meihui Zhang
  • Patent number: 11569762
    Abstract: The present disclosure relates to the technical field of mechanical precision manufacturing, in particular to a motor tracking error reduction method and an implementation device based on a micro-drive unit. A motor tracking error reduction method based on micro-drive unit includes: providing a motor mover as the working output end, and feeding back the position information of the motor mover to the micro-drive controller in real time by the sensor; controlling the micro-drive unit to compensate the displacement of the motor mover by the micro-drive controller; correcting the tracking error of the motor mover after the displacement compensation, and feeding back the tracking error information after correction to the motor controller. The error reduction method and implementation device in the present disclosure reduce the motor tracking error and solve the problem of coupling interference. In addition, the single position feedback is used to reduce the production cost.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: January 31, 2023
    Assignee: GUANGDONG UNIVERSITY OF TECHNOLOGY
    Inventors: Jian Gao, Jindi Zhang, Yuheng Luo, Lingwei Tan, Lanyu Zhang, Xin Chen
  • Publication number: 20220060125
    Abstract: The present disclosure relates to the technical field of mechanical precision manufacturing, in particular to a motor tracking error reduction method and an implementation device based on a micro-drive unit. A motor tracking error reduction method based on micro-drive unit includes: providing a motor mover as the working output end, and feeding back the position information of the motor mover to the micro-drive controller in real time by the sensor; controlling the micro-drive unit to compensate the displacement of the motor mover by the micro-drive controller; correcting the tracking error of the motor mover after the displacement compensation, and feeding back the tracking error information after correction to the motor controller. The error reduction method and implementation device in the present disclosure reduce the motor tracking error and solve the problem of coupling interference. In addition, the single position feedback is used to reduce the production cost.
    Type: Application
    Filed: November 17, 2020
    Publication date: February 24, 2022
    Inventors: Jian GAO, Jindi ZHANG, Yuheng LUO, Lingwei TAN, Lanyu ZHANG, Xin CHEN
  • Patent number: 8885785
    Abstract: Embodiments of the present invention disclose a CDR circuit and a terminal, where the CDR circuit is configured to perform clock synchronization in a terminal with EEE function, and the CDR circuit includes: a phase detector, a first phase signal selector, a loop filter, a numerical controlled oscillator, a second phase signal selector, a phase signal generator, and a state machine. In the embodiments of the present invention, after the terminal enters a REFRESH state from a QUIET state, the CDR circuit can implement clock synchronization with a peer end without waiting for the loop filter and the numerical controlled oscillator to be converged, but the phase signal generator generates a phase signal satisfying a preset clock synchronization condition, and the second phase signal selector selects the phase signal satisfying the preset clock synchronization condition as the phase selection signal of the CDR.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: November 11, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xuekun Zhang, Jindi Zhang, Bo Yu, Faji Yin
  • Patent number: 8823437
    Abstract: Embodiments of the present invention provide a clock signal generator, and the clock signal generator is applied to a physical layer subsystem supporting data transmission at multiple baud rates. The clock signal generator includes: a source clock signal generator, and two or more processors connected to an output end of the source clock signal generator; where the source clock signal generator outputs multiple source clock signals with the same frequency according to a reference signal of a reference clock in the subsystem; the processors perform frequency dividing processing on the multiple source clock signals through a digital logic circuit according to an oversampling technology, to obtain a synchronous clock signal corresponding to a baud rate of data transmission in the subsystem, so as to implement timing and transceiving functions when data is transmitted at the baud rate.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: September 2, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wei Cao, Jindi Zhang, Yingyan Shan
  • Publication number: 20140064422
    Abstract: Embodiments of the present invention disclose a CDR circuit and a terminal, where the CDR circuit is configured to perform clock synchronization in a terminal with EEE function, and the CDR circuit includes: a phase detector, a first phase signal selector, a loop filter, a numerical controlled oscillator, a second phase signal selector, a phase signal generator, and a state machine. In the embodiments of the present invention, after the terminal enters a REFRESH state from a QUIET state, the CDR circuit can implement clock synchronization with a peer end without waiting for the loop filter and the numerical controlled oscillator to be converged, but the phase signal generator generates a phase signal satisfying a preset clock synchronization condition, and the second phase signal selector selects the phase signal satisfying the preset clock synchronization condition as the phase selection signal of the CDR.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 6, 2014
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Xuekun ZHANG, Jindi ZHANG, Bo YU, Faji YIN
  • Publication number: 20130278302
    Abstract: Embodiments of the present invention provide a clock signal generator, and the clock signal generator is applied to a physical layer subsystem supporting data transmission at multiple baud rates. The clock signal generator includes: a source clock signal generator, and two or more processors connected to an output end of the source clock signal generator; where the source clock signal generator outputs multiple source clock signals with the same frequency according to a reference signal of a reference clock in the subsystem; the processors perform frequency dividing processing on the multiple source clock signals through a digital logic circuit according to an oversampling technology, to obtain a synchronous clock signal corresponding to a baud rate of data transmission in the subsystem, so as to implement timing and transceiving functions when data is transmitted at the baud rate.
    Type: Application
    Filed: January 30, 2013
    Publication date: October 24, 2013
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Wei Cao, Jindi Zhang, Yingyan Shan