Patents by Inventor Jing Booth

Jing Booth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10417123
    Abstract: Disclosed embodiments are directed to systems and methods for improving garbage collection and wear leveling performance in data storage systems. The embodiments can improve the efficiency of static wear leveling by picking the best candidate block for static wear leveling and/or postponing static wear leveling on certain candidate blocks. In one embodiment, one or more source blocks for a static wear leveling operation are selected based at least on whether the one or more blocks have a low P/E count and contain static data, such as data that has been garbage collected.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: September 17, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kamyar Souri, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 10114744
    Abstract: Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: October 30, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kamyar Souri, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Publication number: 20170357571
    Abstract: Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.
    Type: Application
    Filed: April 24, 2017
    Publication date: December 14, 2017
    Inventors: Kamyar SOURI, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 9830257
    Abstract: Embodiments of systems and methods that ensure integrity of data during unexpected power interruption of loss are disclosed. In some embodiments, critical data is saved quickly and efficiently using backup power. Data integrity is ensured even when the reliability of backup power sources is an issue. In some embodiments, by skipping the updating and saving of system data while operating on backup power, significant reduction of time for saving critical data can be achieved. System data can be restored next time the data storage system is restarted. Improvements of data storage system reliability are thereby attained.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: November 28, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jing Booth, Stephen J. Silva, Justin Ha
  • Patent number: 9632926
    Abstract: Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: April 25, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kamyar Souri, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 9003224
    Abstract: A data storage system configured to manage unreliable memory units is disclosed. In one embodiment, the data storage system maintains an unreliable memory unit list designating memory units in a non-volatile memory array as reliable or unreliable. The unreliable memory unit list facilitates management of unreliable memory at a granularity level finer than the granularity of a block of memory. The data storage system can add entries to the unreliable memory unit list as unreliable memory units are discovered. Further, the data storage system can continue to perform memory access operations directed to reliable memory units in blocks containing other memory units determined to be unreliable. As a result, the operational life of the data storage system is extended.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 7, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jing Booth, Mei-Man L. Syu
  • Patent number: 8977803
    Abstract: A disk drive is disclosed that utilizes multi-tiered solid state memory for caching data received from a host. Data can be stored in a memory tier that can provide the required performance at a low cost. For example, multi-level cell (MLC) memory can be used to store data that is frequently read but infrequently written. As another example, single-level cell (SLC) memory can be used to store data that is frequently written. Improved performance, reduced costs, and improved power consumption can thereby be attained.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: March 10, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Robert L. Horn, Jing Booth, Chandra M. Guda
  • Patent number: 8862952
    Abstract: A data storage system configured to perform prioritized memory scanning for memory errors is disclosed. In one embodiment, the data storage system prioritizes scanning for memory errors based on a quality attribute of pages or zones of a non-volatile memory array. Pages or zones having quality attributes that reflect a lower level of reliability or endurance than other pages or zones are scanned more frequently for memory errors. When memory errors are discovered, the quality attribute of pages or zones can be adjusted to reflect a lower level of reliability or endurance. In addition, stored data can be recovered before it may become permanently lost and before a host system reads the stored data. Improved performance of the data storage system is thereby attained.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: October 14, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jing Booth, Andrew J. Tomlin
  • Publication number: 20130290793
    Abstract: A data storage system configured to manage unreliable memory units is disclosed. In one embodiment, the data storage system maintains an unreliable memory unit list designating memory units in a non-volatile memory array as reliable or unreliable. The unreliable memory unit list facilitates management of unreliable memory at a granularity level finer than the granularity of a block of memory. The data storage system can add entries to the unreliable memory unit list as unreliable memory units are discovered. Further, the data storage system can continue to perform memory access operations directed to reliable memory units in blocks containing other memory units determined to be unreliable. As a result, the operational life of the data storage system is extended.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: JING BOOTH, MEI-MAN L. SYU
  • Publication number: 20130132638
    Abstract: A disk drive is disclosed that utilizes multi-tiered solid state memory for caching data received from a host. Data can be stored in a memory tier that can provide the required performance at a low cost. For example, multi-level cell (MLC) memory can be used to store data that is frequently read but infrequently written. As another example, single-level cell (SLC) memory can be used to store data that is frequently written. Improved performance, reduced costs, and improved power consumption can thereby be attained.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Robert L. Horn, Jing Booth, Chandra M. Guda
  • Patent number: 8392635
    Abstract: Embodiments of the invention are directed to systems and methods for reducing the number of interrupts on a controller for a non-volatile storage device to improve data transfer performance of the storage system. The embodiments described herein selectively enable an interrupt generated by host transfer hardware for a host command. The interrupt can be enabled or disabled by considering the command type, availability of interface resources to accept additional host transfers, and the command size. Embodiments described herein are useful for host interfaces implementing a tagging scheme for host transfers with a limited range of identification tags.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: March 5, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jing Booth, Rebekah A. Wilson
  • Publication number: 20120166685
    Abstract: Embodiments of the invention are directed to systems and methods for reducing the number of interrupts on a controller for a non-volatile storage device to improve data transfer performance of the storage system. The embodiments described herein selectively enable an interrupt generated by host transfer hardware for a host command. The interrupt can be enabled or disabled by considering the command type, availability of interface resources to accept additional host transfers, and the command size. Embodiments described herein are useful for host interfaces implementing a tagging scheme for host transfers with a limited range of identification tags.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 28, 2012
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: JING BOOTH, REBEKAH A. WILSON
  • Patent number: 8127100
    Abstract: A system and method of buffer management may employ a common data structure that is recognizable by both hardware and firmware. In some implementations, hardware register settings may be programmed independent of firmware updates to an internal sub-segment description table maintained in an ASIC or other buffer manager logic. Implementation of such a common data structure in external memory may substantially reduce hardware real estate and complexity of a buffer manager ASIC by minimizing the number of required registers and eliminating the need for an internal sub-segment descriptor table. In addition, by eliminating the internal sub-segment descriptor table and allowing buffer manager logic to recognize a common data structure in external memory, the number of buffer sub-segments recognized by the buffer manager may be readily expanded, and may be limited only by the size of the external memory.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: February 28, 2012
    Assignee: Marvell International Ltd
    Inventors: Jitendra Kumar Swarnkar, Vincent Wong, Jing Booth, Jie Du
  • Patent number: 7840753
    Abstract: A hard disk drive (HDD) controller comprises a channel module and a control module. The channel module reads and writes data to a magnetic medium. The control module defines non-overlapping first and second areas of the magnetic medium, receives a write request containing first data for a first address in the first area, and caches the first data at a second address in the second area before storing the first data at the first address.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: November 23, 2010
    Assignee: Marvell International Ltd.
    Inventor: Jing Booth