Patents by Inventor Jing-Hong C Zhan

Jing-Hong C Zhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9257746
    Abstract: A phased-array receiver that may be effectively implemented on a silicon substrate. A receiver includes multiple radio frequency (RF) front-ends, each configured to receive a signal with a given delay relative to the others such that the gain of the received signal is highest in a given direction. The receiver also includes a power combination network configured to accept an RF signal from each of the RF front-ends and to pass a combined RF signal to a down-conversion element, where the power distribution network includes a combination of active and passive components. Each RF front-end includes a phase shifter configured to delay the signal in accordance with the given direction and a variable amplifier configured to adjust the gain of the signal.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: February 9, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ping-Yu Chen, Brian A. Floyd, Jie-Wei Lai, Arun S. Natarajan, Sean T. Nicolson, Scott K. Reynolds, Ming-Da Tsai, Alberto Valdes-Garcia, Jing-Hong C. Zhan
  • Publication number: 20140132450
    Abstract: A phased-array receiver that may be effectively implemented on a silicon substrate. A receiver includes multiple radio frequency (RF) front-ends, each configured to receive a signal with a given delay relative to the others such that the gain of the received signal is highest in a given direction. The receiver also includes a power combination network configured to accept an RF signal from each of the RF front-ends and to pass a combined RF signal to a down-conversion element, where the power distribution network includes a combination of active and passive components. Each RF front-end includes a phase shifter configured to delay the signal in accordance with the given direction and a variable amplifier configured to adjust the gain of the signal.
    Type: Application
    Filed: December 20, 2013
    Publication date: May 15, 2014
    Applicants: MediaTek, Inc., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ping-Yu Chen, Brian A. Floyd, Jie-Wei Lai, Arun S. Natarajan, Sean T. Nicolson, Scott K. Reynolds, Ming-Da Tsai, Alberto Valdes-Garcia, Jing-Hong C. Zhan
  • Patent number: 8618983
    Abstract: A phased-array transmitter and receiver that may be effectively implemented on a silicon substrate. The transmitter distributes to front-ends, and the receiver combines signals from front-ends, using a power distribution/combination tree that employs both passive and active elements. By monitoring the power inputs and outputs, a digital control is able to rapidly provide phase and gain correction information to the front-ends. Such a transmitter/receiver includes a plurality of radio frequency (RF) front-ends and a power splitting/combining network that includes active and passive components configured to distribute signals to/from the front-ends.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: December 31, 2013
    Assignees: International Business Machines Corporation, MediaTek Inc.
    Inventors: Ping-Yu Chen, Brian A. Floyd, Jie-Wei Lai, Arun S. Natarajan, Sean T. Nicolson, Scott K. Reynolds, Ming-Dai Tsai, Alberto Valdes-Garcia, Jing-Hong C. Zhan
  • Publication number: 20110063169
    Abstract: A phased-array transmitter and receiver that may be effectively implemented on a silicon substrate. The transmitter distributes to front-ends, and the receiver combines signals from front-ends, using a power distribution/combination tree that employs both passive and active elements. By monitoring the power inputs and outputs, a digital control is able to rapidly provide phase and gain correction information to the front-ends. Such a transmitter/receiver includes a plurality of radio frequency (RF) front-ends and a power splitting/combining network that includes active and passive components configured to distribute signals to/from the front-ends.
    Type: Application
    Filed: March 30, 2010
    Publication date: March 17, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: PING-YU CHEN, Brian A. Floyd, Jie-Wei Lai, Arun S. Natarajan, Sean T. Nicolson, Scott K. Reynolds, Ming-Dai Tsai, Alberto Valdes-Garcia, Jing-Hong C. Zhan
  • Patent number: 7676213
    Abstract: A gate-to-source voltage (Vgs) replication circuit includes a diode-connected NMOS transistor coupled to a current source to draw a drain-to-source current therethrough. The generated Vgs is imposed across a source-to-gate junction of a PMOS transistor. A second PMOS transistor is coupled in series with the first PMOS transistor such that the source-to-gate voltage (Vsg) of the second PMOS transistor replicates the Vgs of the NMOS circuit. The second PMOS transistor is coupled as a source follower to bias other NMOS transistors.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: March 9, 2010
    Inventors: Stewart S. Taylor, Jing-Hong C. Zhan
  • Patent number: 7630697
    Abstract: A radio receiver measures a signal quality metric and modifies attributes of a local oscillator signal in response thereto. A digital signal processor may be used to determine a signal-to-noise-plus-distortion ratio (SNDR) of a baseband signal, and the overlap of two quadrature-related local oscillator signals may be modified.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: December 8, 2009
    Assignee: Intel Corporation
    Inventors: Stewart S. Taylor, Jing-Hong C Zhan, Brent Carlton
  • Patent number: 7539471
    Abstract: An RF receiver front end includes a variable gain low noise amplifier and/or a variable gain mixer to provide gain variability in the receiver. This gain variability may be used during, for example, automatic gain control operations. In at least one embodiment, the variable gain LNA is a broadband device that is capable of supporting multiple wireless standards.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: May 26, 2009
    Assignee: Intel Corporation
    Inventors: Jing-Hong C Zhan, Stewart S. Taylor
  • Patent number: 7456667
    Abstract: The duty cycle of a signal is modified by passing the signal through a plurality of inverting stages. The inverting stages each have bias circuitry to influence the input switching threshold of inverters. Multiple duty cycle modification circuits produce non-overlapping local oscillator signals in a system.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: November 25, 2008
    Inventors: Stewart S. Taylor, Jing-Hong C Zhan
  • Publication number: 20080219329
    Abstract: A radio receiver measures a signal quality metric and modifies attributes of a local oscillator signal in response thereto. A digital signal processor may be used to determine a signal-to-noise-plus-distortion ratio (SNDR) of a baseband signal, and the overlap of two quadrature-related local oscillator signals may be modified.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 11, 2008
    Inventors: Stewart S. Taylor, Jing-Hong C. Zhan, Brent Carlton
  • Patent number: 7423489
    Abstract: Embodiments related to resistive feedback amplifiers are presented herein.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: September 9, 2008
    Assignee: Intel Corporation
    Inventors: Jing-Hong C. Zhan, Stewart S. Taylor
  • Publication number: 20080150594
    Abstract: A wireless device includes a supply independent bias circuit such as a bandgap current generator or a Proportional-To-Absolute-Temperature (PTAT) current generator. A start-up circuit that includes an amplifier and a Schmidt trigger to provide the desired start-up that avoids regulation to an undesired state.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Inventors: Stewart S. Taylor, Jing-Hong C. Zhan
  • Publication number: 20080150624
    Abstract: A gate-to-source voltage (Vgs) replication circuit includes a diode-connected NMOS transistor coupled to a current source to draw a drain-to-source current therethrough. The generated Vgs is imposed across a source-to-gate junction of a PMOS transistor. A second PMOS transistor is coupled in series with the first PMOS transistor such that the source-to-gate voltage (Vsg) of the second PMOS transistor replicates the Vgs of the NMOS circuit. The second PMOS transistor is coupled as a source follower to bias other NMOS transistors.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Inventors: Stewart S. Taylor, Jing-Hong C. Zhan
  • Publication number: 20080150600
    Abstract: The duty cycle of a signal is modified by passing the signal through a plurality of inverting stages. The inverting stages each have bias circuitry to influence the input switching threshold of inverters. Multiple duty cycle modification circuits produce non-overlapping local oscillator signals in a system.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Inventors: Stewart S. Taylor, Jing-Hong C. Zhan
  • Patent number: 7332964
    Abstract: A gain-step transconductor circuit operates with multiple gain values. The gain can be stepped from one gain value to another by selecting a different signal path between an input node and an output amplifier. The output amplifier may operate as a common source amplifier or a common gate amplifier.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Jing-Hong C Zhan, Stewart S. Taylor
  • Publication number: 20070290755
    Abstract: A gain-step transconductor circuit operates with multiple gain values. The gain can be stepped from one gain value to another by selecting a different signal path between an input node and an output amplifier. The output amplifier may operate as a common source amplifier or a common gate amplifier.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 20, 2007
    Inventors: Jing-Hong C. Zhan, Stewart S. Taylor
  • Publication number: 20070268072
    Abstract: Embodiments related to resistive feedback amplifiers are presented herein.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 22, 2007
    Inventors: Jing-Hong C. Zhan, Stewart S. Taylor
  • Patent number: 7288996
    Abstract: An apparatus reducing non-linearity in an output signal presented at an output locus of an amplifier device having an output unit coupled with the output locus, the output unit having at least one first operating characteristic contributing to the non-linearity, includes a compensating unit coupled with the output locus. The compensating unit has at least one second operating characteristic cooperating with the at least one first operating characteristic to effect the reducing.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: October 30, 2007
    Assignee: Intel Corporation
    Inventors: Jing-Hong C Zhan, Stewart S. Taylor