Abstract: A plurality of devices for testing, connected in series using one or more redistribution layers (RDLs), are used to perform a semiconductor device test on a plurality of dies. As a result, the semiconductor device test may support thousands of gross dies per wafer or greater (e.g., 10,000 dies or greater). Furthermore, the RDL(s) may be removed after use. In some implementations, the devices for testing corresponding to the dies may execute the semiconductor device test sequentially. Accordingly, test data may be generated and may include a bit sequence, where a first bit in the bit sequence indicates an overall outcome for the test and one or more subsequent bits in the bit sequence indicate respective outcomes for each semiconductor dies or for each line of the semiconductor device test.

Abstract: A semiconductor structure includes a substrate including a first region and a second region; a first device disposed in the first region and a second device disposed in the second region; a first isolation disposed in the first region, wherein the first isolation is between a first source and a first drain, a first spacer overlaps the first isolation, the first isolation is separated from the first spacer by a first gate dielectric.

Abstract: A semiconductor structure includes a semiconductor substrate including a first region and a second region; a first device disposed in the first region and a second device disposed in the second region, wherein a voltage level of the first device is greater than a voltage level of the second device; a first isolation disposed in the first region, wherein the first isolation includes a first depth; and a second isolation disposed in the second region, wherein the second isolation includes a second depth, and the first depth is greater than the second depth.

Abstract: A semiconductor structure includes a semiconductor substrate including a first region and a second region; a first device disposed in the first region and a second device disposed in the second region, wherein a voltage level of the first device is greater than a voltage level of the second device; a first isolation disposed in the first region, wherein the first isolation includes a first depth; and a second isolation disposed in the second region, wherein the second isolation includes a second depth, and the first depth is greater than the second depth.

Abstract: An access control system includes a portable user device, an access control apparatus and a portable administrator device. The access control apparatus includes a first near field communication (NFC) unit and stores a first valid user list. The portable administrator device includes a second NFC unit and stores a second valid user list. The first NFC unit and the second NFC unit are operable to enable communication between the access control apparatus and the portable administrator device, and the access control apparatus and the portable administrator device are operable to synchronize contents of the first valid user list stored in the access control apparatus and the second valid user list stored in the portable administrator device.

Abstract: An image processing apparatus for deinterlacing and vertical scaling a plurality of initial scan lines includes a control unit, a deinterlacer, a vertical scaler and a buffer. The control unit controls the deinterlacer and the vertical scaler to store parts of the processed scan lines thereof into the buffer according to a scaling ratio factor and a vertical scaling algorithm.

Abstract: A multimedia data processing apparatus with reduced buffer size includes an accessing unit and a data processing module. The accessing unit has a plurality of buffers therein. The data processing module includes a processing unit and a real-time buffer. The processing unit processes the data temporarily stored in the accessing unit and the real-time buffer. By adding the real-time buffer, the size of the buffer in the accessing unit and the maximum bandwidth requirement can be reduced thereby increasing the system performance.

Abstract: A multimedia data processing apparatus with reduced buffer size includes an accessing unit and a data processing module. The accessing unit has a plurality of buffers therein. The data processing module includes a processing unit and a real-time buffer. The processing unit processes the data temporarily stored in the accessing unit and the real-time buffer. By adding the real-time buffer, the size of the buffer in the accessing unit and the maximum bandwidth requirement can be reduced thereby increasing the system performance.

Abstract: An image processing apparatus for deinterlacing and vertical scaling a plurality of initial scan lines includes a control unit, a deinterlacer, a vertical scaler and a buffer. The control unit controls the deinterlacer and the vertical scaler to store parts of the processed scan lines thereof into the buffer according to a scaling ratio factor and a vertical scaling algorithm.

Abstract: A data processing system includes a central processing unit having a cache memory, a main memory for storing data which will be processed by the central processing unit, and an agent circuit having a data buffer, coupled to the central processing unit; wherein the agent circuit actively reads the data from the main memory to the data buffer such that when a cache miss occurs, the central processing unit can obtain the data straight from the data buffer whereby increasing its MIPS rate.

Abstract: A system for bandwidth sharing in busses comprises a shared bus, a timer for counting a predetermined period of time, a real-time master having a priority for using the shared bus, and a central processing unit having a priority higher than that of the real-time master for using the shared bus, wherein the central processing unit sends a predetermined number of bus request signals within the predetermined period of time for requesting the right for using the shared bus to transmit data. The present invention also provides a method for bandwidth sharing in busses.

Abstract: A system for bandwidth sharing in busses comprises a priority-based shared bus, a timer for counting a predetermined period of time, and a plurality of masters using the shared bus to transmit data, wherein one of the masters has the highest priority to use the shared bus and can only send a predetermined number of bus request signals within the predetermined period of time for requesting the right for using the shared bus to transmit data. The present invention also provides a method for bandwidth sharing in busses.

Abstract: Disclosed is focus control method for Delta-Sigma based image formation devices in which a steering term and a focusing term of a delay formula are respectively quantized, and corresponding two channels at both sides of the probe are synchronized by a delay produced during dynamic focusing. During synchronizing the two channels, two numeral values with equal absolute value but with opposite signs are respectively inserted so as to eliminate extra noise the signals are after summing up, and controlling common delay of the two channels is performed by same one controller. After summing up the inserted two values, the dynamic aperture control of the Delta-Sigma based image formation device can be effectively realized and noise during dynamic focusing also is eliminated thereby achieving an ideal single bit output.

Abstract: Disclosed is focus control method for Delta-Sigma based image formation devices in which a steering term and a focusing term of a delay formula are respectively quantized, and corresponding two channels at both sides of the probe are synchronized by a delay produced during dynamic focusing. During synchronizing the two channels, two numeral values with equal absolute value but with opposite signs are respectively inserted so as to eliminate extra noise the signals are after summing up, and controlling common delay of the two channels is performed by same one controller. After summing up the inserted two values, the dynamic aperture control of the Delta-Sigma based image formation device can be effectively realized and noise during dynamic focusing also is eliminated thereby achieving an ideal single bit output.

Abstract: Methods perform dynamic focusing of a coherent array imaging system are invented. Dynamic focusing in ultrasonic array imaging involves extensive real-time computations and data communication. Particularly for real-time three-dimensional imaging using fully-sampled two-dimensional arrays, implementation of dynamic focusing can be extremely complicated. The invention described in this disclosure greatly simplifies the delay control mechanism by exploiting both spatial and temporal characteristics of the focusing delay patterns. The simplification primarily results from (1) grouping adjacent channels into sub-apertures for the range dependent focusing component, and (2) non-uniform quantization of the delay values.