Patents by Inventor Jing-Kai HUANG

Jing-Kai HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11947208
    Abstract: This invention discloses a display panel including a first substrate, light emitting elements, a touch sensing structure and a conductive layer. The light emitting elements are disposed on the first substrate. The touch sensing structure is disposed on the first substrate and on a side away from a light emitting surface of the light emitting elements. The conductive layer is disposed between the light emitting elements and the first substrate and includes contacts or at least a portion of the touch sensing structure, and the light emitting elements and the contacts are electrically connected.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: April 2, 2024
    Assignee: HANNSTAR DISPLAY CORPORATION
    Inventors: Jing-Xuan Chen, Cheng-Yen Yeh, Mu-Kai Kang, Sz-Kai Huang, Ming-Chang Yu
  • Patent number: 11917923
    Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
  • Patent number: 11329170
    Abstract: A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: May 10, 2022
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Ming-Yang Li, Jing-Kai Huang, Lain-Jong Li
  • Patent number: 10998452
    Abstract: A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: May 4, 2021
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Ming-Yang Li, Jing-Kai Huang, Lain-Jong Li
  • Publication number: 20210119060
    Abstract: A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 22, 2021
    Inventors: Ming-Yang LI, Jing-Kai HUANG, Lain-Jong LI
  • Publication number: 20200274003
    Abstract: A method for forming a semiconductor device having a lateral semiconductor heterojunction involves forming a first metal chalcogenide layer of the lateral semiconductor heterojunction adjacent to a first metal electrode on a substrate. The first metal chalcogenide layer includes a same metal as the first metal electrode and at least some of the first metal chalcogenide layer includes metal from the first metal electrode. A second metal chalcogenide layer of the lateral semiconductor heterojunction is formed adjacent to the first metal chalcogenide layer. A second metal electrode is formed adjacent to the second metal chalcogenide layer. The second metal chalcogenide layer includes a same metal as the second metal electrode.
    Type: Application
    Filed: September 20, 2018
    Publication date: August 27, 2020
    Inventors: Ming-Yang LI, Jing-Kai HUANG, Lain-Jong LI