Patents by Inventor Jing-Ling Wang

Jing-Ling Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230403645
    Abstract: A data processing method for a low-power wireless personal area network (WPAN) system and a mirror server are provided. The low-power WPAN system includes an electronic device, and the data processing method includes: receiving sensing data at time intervals, and in response to determining that a last data record of the sensing data of a first time segment is received in a fault-tolerant time segment, triggering a rollover mechanism to move the sensing data stored in a memory block that is indexed as a (k+1)th time segment of kth previous unit time before the first time segment into a memory block that is indexed as a (k+2)th time segment of an (k+1) previous unit time before the first time segment, and move the sensing data stored in the memory block indexed as the first time segment into the memory block indexed as the second time segment.
    Type: Application
    Filed: November 7, 2022
    Publication date: December 14, 2023
    Inventors: JING-LING WANG, YU-CHIEH HUANG, CHIEN-YU CHEN
  • Publication number: 20130200519
    Abstract: The present invention relates to a method of fabricating a through silicon via (TSV) structure, in which, a dielectric layer is disposed to cover surface of each of a device region of a substrate and a sidewall and a bottom of a via hole in a TSV region of the substrate, and the via hole having the dielectric layer covering the sidewall and the bottom is filled with a conductive material. The present invention also relates to a TSV structure, in which, a dielectric layer disposed in the device region of a substrate extends to the via hole in a TSV region of the substrate to cover surface of the sidewall of the via hole to serve as a dielectric liner, and a conductive material is filled into the via hole having the dielectric layer covering the sidewall.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 8, 2013
    Inventors: Ji Feng, Hailong Gu, Ying-Tu Chen, Jing-Ling Wang
  • Publication number: 20090042388
    Abstract: A semiconductor substrate is first provided. The semiconductor substrate includes a material layer and a patterned photoresist layer disposed on the material layer. Subsequently, a contact etching process is performed on the material layer by utilizing the patterned photoresist layer as an etching mask so to form an etched hole in the material layer. Thereafter, a solvent cleaning process is carried out on the semiconductor substrate by utilizing a cleaning solvent. Next, a water cleaning process is performed on the semiconductor substrate by utilizing deionized water. The temperature of the deionized water is in a range from 30° C. to 99° C.
    Type: Application
    Filed: August 10, 2007
    Publication date: February 12, 2009
    Inventors: Zhi-Qiang Sun, Tien-Cheng Lan, Hua-Kuo Lee, Jing-Hao Chen, Wen-Chun Huang, Run-Shun Wang, Jing-Ling Wang, Da-Jiang Yang, Chee-Siang Ong