Patents by Inventor Jing-Min Chen

Jing-Min Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230121432
    Abstract: An optical sensing circuit and an optical sensing method are provided. The optical sensing circuit includes a first photosensitive unit, a second photosensitive unit, an arithmetic unit, and a control unit. The first photosensitive unit and the second photosensitive unit provide a sensing current during a light sensing period. The arithmetic unit generates a combined current according to the sensing current during the light sensing period. The control unit generates a first sensed value and a second sensed value according to the combined current.
    Type: Application
    Filed: June 23, 2022
    Publication date: April 20, 2023
    Applicant: Egis Technology Inc.
    Inventors: Jing-Min Chen, Yao-Sheng Hu
  • Patent number: 11515721
    Abstract: A dual-slope optical sensor is provided. Two terminals of a first charging switch are respectively connected to an optoelectronic component and a first terminal of a capacitor. Two terminals of a second charging switch are respectively connected to a second terminal of the capacitor and grounded. First terminals of third charging and discharging switches are respectively connected to the first and second terminals of the capacitor. First terminals of fourth charging and discharging switches are respectively coupled to first and second reference voltages. Two terminals of a first discharging switch are respectively connected to the optoelectronic component and the second terminal of the capacitor. A first input terminal of a comparator is connected to second terminals of the third charging switch and the fourth discharging switch. A second input terminal of the comparator is connected to second terminals of the fourth charging switch and the third discharging switch.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 29, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Jing-Min Chen, Jia-Hua Hong
  • Publication number: 20220094193
    Abstract: A dual-slope optical sensor is provided. Two terminals of a first charging switch are respectively connected to an optoelectronic component and a first terminal of a capacitor. Two terminals of a second charging switch are respectively connected to a second terminal of the capacitor and grounded. First terminals of third charging and discharging switches are respectively connected to the first and second terminals of the capacitor. First terminals of fourth charging and discharging switches are respectively coupled to first and second reference voltages. Two terminals of a first discharging switch are respectively connected to the optoelectronic component and the second terminal of the capacitor. A first input terminal of a comparator is connected to second terminals of the third charging switch and the fourth discharging switch. A second input terminal of the comparator is connected to second terminals of the fourth charging switch and the third discharging switch.
    Type: Application
    Filed: December 16, 2020
    Publication date: March 24, 2022
    Inventors: JING-MIN CHEN, Jia-Hua Hong
  • Patent number: 11255726
    Abstract: An optical sensor and a method having a high linearity digital controlling mechanism are provided. An optoelectronic component converts a light energy into a photocurrent. Then, the photocurrent flows to a current mirror and is amplified by a gain to form a charging current by the current mirror to charge a capacitor. A comparator compares a voltage of the capacitor with a reference voltage multiple times to generate a comparison signal. A counter determines a digital value capturing range according to the gain, and counts bit values that fall within the digital value capturing range from the comparison signal to output a counted signal. A noise cancellation processor reduces the digital value capturing range according to the gain, and removes one or more of the bit values that do not fall within the digital value capturing range from the counted signal to output a sensed signal.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: February 22, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Jing-Min Chen
  • Publication number: 20210185784
    Abstract: A proximity sensor with a sliced integration time sensing mechanism and a sensing method thereof are provided. A light transmitter emits a sensing light toward a detected object during a first phase time. A light receiver receives a first light signal formed by the sensing light reflected by the detected object and an ambient light during the first phase time, and receives a second light signal of the ambient light during a second phase time. A first brightness of the first light signal is integrated over the first phase time to form a first integrated brightness value. A second brightness of the second light signal is integrated over the second phase time to form a second integrated brightness value. The light receiver subtracts the second integrated brightness value from the first integrated brightness value to obtain a first integrated brightness correction value by phase cancellation.
    Type: Application
    Filed: March 30, 2020
    Publication date: June 17, 2021
    Inventors: Yi-Jung Huang, JING-MIN CHEN, CHIH-NING CHEN
  • Patent number: 11039521
    Abstract: A proximity sensor with a sliced integration time sensing mechanism and a sensing method thereof are provided. A light transmitter emits a sensing light toward a detected object during a first phase time. A light receiver receives a first light signal formed by the sensing light reflected by the detected object and an ambient light during the first phase time, and receives a second light signal of the ambient light during a second phase time. A first brightness of the first light signal is integrated over the first phase time to form a first integrated brightness value. A second brightness of the second light signal is integrated over the second phase time to form a second integrated brightness value. The light receiver subtracts the second integrated brightness value from the first integrated brightness value to obtain a first integrated brightness correction value by phase cancellation.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: June 15, 2021
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Yi-Jung Huang, Jing-Min Chen, Chih-Ning Chen
  • Patent number: 11009996
    Abstract: An optical proximity sensor with a digital calibration circuit and a digital calibration method are provided. In a test mode, a test light emitted by a light transmitter is reflected by a cover of an electronic device to form a first reflected analog signal to a light receiver. A digital calibration circuit counts the first number of pulse waves of a first reflected digital signal. In a calibration mode, a light is emitted to a detected object through the cover and then is reflected by the detected object to form a second reflected analog signal to the light receiver. When the digital calibration circuit counts the number of pulse waves of a second reflected digital signal up to the first number, the digital calibration circuit clears the first number and then recounts the number of pulse waves of the second reflected digital signal to obtain the second number.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: May 18, 2021
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Jing-Min Chen
  • Publication number: 20210081072
    Abstract: An optical proximity sensor with a digital calibration circuit and a digital calibration method are provided. In a test mode, a test light emitted by a light transmitter is reflected by a cover of an electronic device to form a first reflected analog signal to a light receiver. A digital calibration circuit counts the first number of pulse waves of a first reflected digital signal. In a calibration mode, a light is emitted to a detected object through the cover and then is reflected by the detected object to form a second reflected analog signal to the light receiver. When the digital calibration circuit counts the number of pulse waves of a second reflected digital signal up to the first number, the digital calibration circuit clears the first number and then recounts the number of pulse waves of the second reflected digital signal to obtain the second number.
    Type: Application
    Filed: December 11, 2019
    Publication date: March 18, 2021
    Inventor: JING-MIN CHEN
  • Patent number: 10541695
    Abstract: A fast-locking phase locked loop and a fast locking method are provided. The fast locking method includes dividing a frequency of an oscillation signal by a preset divisor to output a divided signal, detecting a frequency difference between the divided signal and a reference signal, tracking whether a divided frequency of the divided signal falls within a locked frequency range or not, if not, tracking the divided frequency, and if yes, locking the divided frequency, detecting a divided phase difference between a divided phase of the divided signal and a reference phase of the reference signal, recording the phase difference as a tracking reference phase difference, tracking a next divided phase according to the tracking reference phase difference, and determining whether the divided phase falls within a locked phase range, and if not, tracking the divided phase, and if yes, locking the divided phase.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: January 21, 2020
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Yuan-Hung Wang, Jing-Min Chen
  • Publication number: 20190363721
    Abstract: A fast-locking phase locked loop and a fast locking method are provided. The fast locking method includes dividing a frequency of an oscillation signal by a preset divisor to output a divided signal, detecting a frequency difference between the divided signal and a reference signal, tracking whether a divided frequency of the divided signal falls within a locked frequency range or not, if not, tracking the divided frequency, and if yes, locking the divided frequency, detecting a divided phase difference between a divided phase of the divided signal and a reference phase of the reference signal, recording the phase difference as a tracking reference phase difference, tracking a next divided phase according to the tracking reference phase difference, and determining whether the divided phase falls within a locked phase range, and if not, tracking the divided phase, and if yes, locking the divided phase.
    Type: Application
    Filed: September 6, 2018
    Publication date: November 28, 2019
    Inventors: YUAN-HUNG WANG, JING-MIN CHEN
  • Patent number: 10340924
    Abstract: A digital phase-locked loop with an automatic calibration function and an automatic calibration method thereof are provided. The digital phase-locked loop includes a frequency and phase detector, a calibration circuit, a frequency and phase locked circuit, and an oscillator circuit. The frequency and phase locked circuit outputs an initial control signal. The calibration circuit calibrates an initial frequency and outputs an initial calibration signal having a calibrated initial frequency when determining that the initial frequency does not fall within an allowable error calibration range. The frequency and phase locked circuit locks the calibrated initial frequency when determining that the calibrated initial frequency falls within a locked frequency range. The oscillator circuit outputs an oscillator signal according to the initial calibration signal and the initial control signal.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 2, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Jing-Min Chen