Patents by Inventor Jing Sang Liu

Jing Sang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250224871
    Abstract: Methods, systems, and devices for enhancements for multiple data plane read commands are described. In some examples, a memory system may receive a set of multiple read commands and may determine whether a quantity of planes associated with the set of multiple read commands satisfies a threshold. Based on determining that the quantity of planes satisfies a threshold, the memory system may output a multi-plane read command. A memory device may obtain a multi-plane read command and may initiate a first transfer for a first plane based on obtaining the multi-plane read command. The memory device may then generate one or more single-plane commands for one or more planes associated with the multi-plane read command and may initiate a respective data transfer for each of the one or more planes.
    Type: Application
    Filed: December 18, 2024
    Publication date: July 10, 2025
    Inventors: Yutong Lin, Jing Sang Liu, Peng Fei
  • Patent number: 11693774
    Abstract: A method is described, which includes receiving, by a memory subsystem, a memory command targeted at a memory array; determining, by the memory subsystem, if the memory command is a high priority memory command; and determining if the memory subsystem is processing any non-high priority memory commands. The memory subsystem enables a read page cache mode for processing the memory command in response to determining that (1) the memory command is a high priority memory command and (2) the memory subsystem is not processing any non-high priority memory commands Thereafter, the memory subsystem processes the memory command using the read page cache mode.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: July 4, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Jiangang Wu, Jing Sang Liu, Jung Sheng Hoei, Kishore Kumar Muchherla, Mark Ish, Myoung Jun Go, Nolan Tran, Qisong Lin
  • Publication number: 20230065231
    Abstract: A method is described, which includes receiving, by a memory subsystem, a memory command targeted at a memory array; determining, by the memory subsystem, if the memory command is a high priority memory command; and determining if the memory subsystem is processing any non-high priority memory commands. The memory subsystem enables a read page cache mode for processing the memory command in response to determining that (1) the memory command is a high priority memory command and (2) the memory subsystem is not processing any non-high priority memory commands Thereafter, the memory subsystem processes the memory command using the read page cache mode.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 2, 2023
    Inventors: Jiangang Wu, Jing Sang Liu, Jung Sheng Hoei, Kishore Kumar Muchherla, Mark Ish, Myoung Jun Go, Nolan Tran, Qisong Lin
  • Publication number: 20220413719
    Abstract: Methods, systems, and devices for data stream processing for maintaining queues for memory sub-systems are described. A number of commands included in a queue of a plurality of queues of a memory die of a memory sub-system can be determined. Each queue can be associated with a respective priority level and can be configured to maintain a respective set of commands. A command can be assigned to the queue based on a number of commands included in the queue. One or more commands can be issued from the queues based on the respective priority levels of the queues.
    Type: Application
    Filed: March 10, 2020
    Publication date: December 29, 2022
    Inventors: Jiangang Wu, Jing Sang Liu, James P. Crowley, Yun Li
  • Publication number: 20220404979
    Abstract: Methods, systems, and devices for managing queues of a memory sub-system are described. A first command can be assigned to a first queue of a memory die of a memory sub-system. The first queue can be is associated with a first priority level and the memory die can include a second queue associated with a second priority level different from the first priority level. The second queue can include a second command, where the first command and the second command are each associated with a respective operation to be performed on the memory sub-system. In some examples, the first command can be issued before the second command based on the first and second priority levels.
    Type: Application
    Filed: March 10, 2020
    Publication date: December 22, 2022
    Inventors: Jiangang Wu, Jing Sang Liu, Yun Li, James P. Crowley