Abstract: A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.

Abstract: A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.

Abstract: A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.

Abstract: A reinforced semiconductor package (20,30) and method utilizes at least one of the grooves (15,16) and ridges (24,25) formed on the package body (17,23) to reinforce the package body (17,23) to prevent warping of the package after molding.

Abstract: A method and apparatus for fabricating small form factor semiconductor chips having high temperature resistance, good humidity and chemical resistance and good dielectric properties. The semiconductor chip includes a lead frame (10) attached to an integrated circuit die (30) by a lead-on-chip (LOC) method. Wire bonds (40) are employed to connect the integrated circuit die (30) to conduction leads (75) on the lead frame (10). After the wire bonding process, the surface of the wire bonded integrated circuit is encapsulated with a layer of resin (50) using either a direct dispensing method or by a screen printing method. The encapsulated integrated circuit may then be cured and functionally tested.

Abstract: An integrated circuit package having a top opening and a cavity, with a chip adhered in the cavity. The top opening has routing strips electrically connecting the top opening with the outer surface. The routing strips are electronically connected to bonding pads located in a central area of the chip. Following assembly of the components, the top opening and the cavity are encapsulated in a molding process. A method is provided for forming a substantially flat integrated circuit package.

Abstract: A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.

Abstract: A lead (10) for a semiconductor device (12) comprising a strip portion (14) comprising a first substantially horizontal portion (18) connected to the semiconductor device (12), a substantially vertical portion (20) connected to the first substantially horizontal portion (18), and a second substantially horizontal portion (22) connected to the substantially vertical portion (20) with at least one hole (16) disposed in the strip portion (14). A method of providing an electrical contact for connecting a semiconductor device (12) to a surface (24) comprising the steps of extending at least one lead (10) from the semiconductor device (12) and slotting the lead (10).

Abstract: An integrated circuit package (30) including a substrate (70) having an opening (86) and first and second surfaces(92, 94), a plurality of pads (100) disposed on the first and second surfaces (92, 94) having disposed thereon solder balls (150) electrically connected by a via (84) that provides the end-user with flexibility in the location of a power supply Pin (96) is disclosed.

Abstract: The invention is to a double side semiconductor module (10) and an array (40) made up of a plurality of stacked modules (10). Each module (10) includes a plurality of substrates (11-15). A first substrate (13) has first and second sides, with one semiconductor device (16,25) having bond pads thereon (17,26), mounted on each of said first and second sides. At least one additional substrate (12,14) having a central opening (12b,14b), is placed on each of said first and second sides with the semiconductor device (16,25) mounted in the central opening (12b,14b). A plurality of solder pins (11a-15a), associated with each of said substrates (11-15) are connected to contact pads (17,26) on the semiconductor devices (16,25), and extend from and to openings in said substrates (11-15).

Abstract: A lead (10) for a semiconductor device (12) comprising a strip portion (14) comprising a first substantially horizontal portion (18) connected to the semiconductor device (12), a substantially vertical portion (20) connected to the first substantially horizontal portion (18), and a second substantially horizontal portion (22) connected to the substantially vertical portion (20) with at least one hole (16) disposed in the strip portion (14). A method of providing an electrical contact for connecting a semiconductor device (12) to a surface (24) comprising the steps of extending at least one lead (10) from the semiconductor device (12) and slotting the lead (10).