Patents by Inventor Jing-Syun Wang

Jing-Syun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit and testing circuit therein for testing and failure analysis
    Patent number: 7750658
    Abstract: A testing circuit includes at least two contact terminals and a plurality of first resistors. The contact terminals are located on a substrate and respectively connected to two ends of an original circuit on the substrate. The first resistors are embedded in the substrate and respectively connected to a plurality of devices of the original circuit in parallel or in series.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: July 6, 2010
    Inventor: Jing-Syun Wang
  • TESTING CIRCUIT AND INTEGRATED CIRCUIT
    Publication number: 20080303542
    Abstract: A testing circuit includes at least two contact terminals and a plurality of first resistors. The contact terminals are located on a substrate and respectively connected to two ends of an original circuit on the substrate. The first resistors are embedded in the substrate and respectively connected to a plurality of devices of the original circuit in parallel or in series.
    Type: Application
    Filed: January 18, 2008
    Publication date: December 11, 2008
    Inventor: Jing-Syun Wang