Patents by Inventor Jing-Yi Lin

Jing-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210157369
    Abstract: An electronic device includes a first body, a second body, two hinges, and at least one electronic assembly. The two hinges are connected between the first body and the second body, and the first body and the second body are adapted to rotate relatively through the two hinges. The electronic assembly is connected to the second body and is located between the two hinges.
    Type: Application
    Filed: February 4, 2021
    Publication date: May 27, 2021
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Ming-Chung Peng, Ko-Fan Chen, Chun-Yi Ho, Chien-Ting Lin, Yu-Jung Liu, Hsin-Jung Lee, Hsin-Yu Huang, Jih-Houng Lee, Ming-Feng Liu, Kuo-Jung Wu, Kuo-Pin Chen, Chia-Ling Lee, Jing-Jie Lin
  • Publication number: 20210098473
    Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
    Type: Application
    Filed: September 1, 2020
    Publication date: April 1, 2021
    Inventors: Shih-Hao Lin, Kian-Long Lim, Chih-Chuan Yang, Chia-Hao Pao, Jing-Yi Lin
  • Publication number: 20190371916
    Abstract: A semiconductor structure having a metal gate includes a dielectric layer. The dielectric layer having a recess is disposed on a substrate, wherein the dielectric layer has a top part and a bottom part, and the tensile stress of the top part is larger than the tensile stress of the bottom part, thereby the recess having a sidewall profile tapering from bottom to top. The present invention also provides a method of forming said semiconductor structure.
    Type: Application
    Filed: June 26, 2018
    Publication date: December 5, 2019
    Inventors: Jing-Yi Lin, Yi-Wen Chen, Hung-Yi Wu, Ping-Wei Huang, Shao-Wei Wang, Yueh-Chi Chuang, Hung-Jen Huang, Hao-Che Feng
  • Patent number: 8474914
    Abstract: An armrest adjustment device includes an armrest arranged at a top surface of an armrest support. The lower part of the armrest support is connected to a chair seat. The armrest can be adjusted to move forward and backward in relation to the chair seat. A first component is mounted in the armrest. The first component is assembled with and fixed on the armrest support so that the armrest can be moved forward and backward in relation to the first component. Moreover, a second component is arranged between the armrest and the armrest support. Instead of the first component, the second component is assembled with and fixed on the armrest support. Thus the armrest is moved in the left/right direction in relation to the second component.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: July 2, 2013
    Assignee: ATec International Team Co., Ltd.
    Inventors: Te-Chun Chen, Jing-Yi Lin
  • Publication number: 20120025584
    Abstract: An armrest adjustment device is revealed. The armrest adjustment device includes an armrest arranged at a top surface of an armrest support. The lower part of the armrest support is connected to a chair seat. The armrest can be adjusted to move forward and backward in relation to the chair seat. A first component is mounted in the armrest. The first component is assembled with and fixed on the armrest support so that the armrest can be moved forward and backward in relation to the first component. Moreover, a second component is arranged between the armrest and the armrest support. Instead of the first component, the second component is assembled with and fixed on the armrest support. Thus the armrest is moved in the left/right direction in relation to the second component.
    Type: Application
    Filed: June 29, 2011
    Publication date: February 2, 2012
    Inventors: Te-Chun CHEN, Jing-Yi Lin
  • Patent number: 7977254
    Abstract: A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing process. The photo-assisted electrochemical process uses an electrolyte bath including buffered CH3COOH at a pH between about 5.5 and 7.5. The rapid thermal annealing process is conducted in O2 environment at a temperature between about 500° C. and 800° C.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: July 12, 2011
    Assignee: Tekcore Co., Ltd.
    Inventors: Lung-Han Peng, Han-Ming Wu, Jing-Yi Lin
  • Publication number: 20110124203
    Abstract: A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing process. The photo-assisted electrochemical process uses an electrolyte bath including buffered CH3COOH at a pH between about 5.5 and 7.5. The rapid thermal annealing process is conducted in O2 environment at a temperature between about 500° C. and 800° C.
    Type: Application
    Filed: June 27, 2007
    Publication date: May 26, 2011
    Inventors: Lung-Han Peng, Han-Ming Wu, Jing-Yi Lin
  • Patent number: 7253061
    Abstract: A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing process. The photo-assisted electrochemical process uses an electrolyte bath including buffered CH3COOH at a pH between about 5.5 and 7.5. The rapid thermal annealing process is conducted in O2 environment at a temperature between about 500° C. and 800° C.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: August 7, 2007
    Assignee: Tekcore Co., Ltd.
    Inventors: Lung-Han Peng, Han-Ming Wu, Jing-Yi Lin
  • Publication number: 20060121700
    Abstract: A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing process. The photo-assisted electrochemical process uses an electrolyte bath including buffered CH3COOH at a pH between about 5.5 and 7.5. The rapid thermal annealing process is conducted in O2 environment at a temperature between about 500° C. and 800° C.
    Type: Application
    Filed: December 6, 2004
    Publication date: June 8, 2006
    Inventors: Lung-Han Peng, Han-Ming Wu, Jing-Yi Lin