Patents by Inventor Jingang Fang

Jingang Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961848
    Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display device. The display substrate comprises: a substrate base, and an active layer, a gate insulating layer, a first metal film layer, an interlayer insulating layer, a second metal film layer, and a passivation layer stacked in sequence on the substrate base. The first metal film layer comprises a pattern of a gate and a gate line. The second metal film layer comprises a pattern of a source/drain and a data line. The gate line and the data line are partially arranged opposite to each other. An oxide metal layer is provided on the surface of the side of the region of the gate line opposite to the data line facing the data line.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: April 16, 2024
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jun Liu, Liangchen Yan, Bin Zhou, Yadong Liang, Ning Liu, Leilei Cheng, Jingang Fang
  • Patent number: 11930679
    Abstract: The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: March 12, 2024
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jingang Fang, Luke Ding, Jun Liu, Bin Zhou, Jun Cheng
  • Patent number: 11910636
    Abstract: Provided are a display substrate and a display apparatus. The display substrate includes a base substrate, and an auxiliary cathode structure located on a side of the base substrate, the auxiliary cathode structure including a first conductive layer, an intermediate support layer, and a second conductive layer. In an implementation, a side of the intermediate support layer close to the first conductive layer includes any one or more of first protrusions and first grooves, and a side of the first conductive layer close to the intermediate support layer includes any one or more of second grooves engaged with the first protrusions and second protrusions engaged with the first grooves which are correspondingly disposed.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: February 20, 2024
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Qinghe Wang, Jun Cheng, Tongshang Su, Ning Liu, Haitao Wang, Yongchao Huang, Jingang Fang, Liusong Ni, Liangchen Yan
  • Publication number: 20240049539
    Abstract: A display substrate, a method for fabricating the same, and a display panel are provided. The display substrate includes: a substrate, and a first conductive layer, at least two insulation layers, and a second conductive layer, the second conductive layer being electrically connected with the first conductive layer through via-holes, and the at least two insulation layers including a first insulation layer in contact with the first conductive layer, wherein the display substrate further includes an assisting alignment structure on the surface of the first insulation layer, and the orthographic projection of the assisting alignment structure surrounds at least part of the edge of the orthographic projection of the first via-hole in the first insulation layer on the substrate, so that the orthographic projection of the first via-hole on the first conductive layer lies within the pattern of the first conductive layer.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 8, 2024
    Inventors: Jingang FANG, Luke DING, Bin ZHOU, Miao ZHANG
  • Publication number: 20230413618
    Abstract: Disclosed are a display panel, a manufacturing method therefor, and a display apparatus. The display panel comprises: a base substrate (10); a padding layer (20) arranged at one side of the base substrate (10); a thin film transistor structure layer (30) arranged at one side of the base substrate (10); a planar layer (40) arranged at the side of the thin film transistor structure layer (30) away from the base substrate (10); an organic electroluminescent device (50) arranged at the side of the planar layer (40) away from the base substrate (10), the organic electroluminescent device (50) comprising an anode (51), an effective light emission layer (52), and a cathode (53) in a layered arrangement; an auxiliary electrode (60) arranged on the side of the thin film transistor structure layer (30) away from the base substrate (10).
    Type: Application
    Filed: December 24, 2020
    Publication date: December 21, 2023
    Inventors: Jingang FANG, Luke DING, Jun LIU, Wei LI, Jun CHENG
  • Publication number: 20230389349
    Abstract: An organic electroluminescent display panel, a method of manufacturing the same, and a display device that can alleviate or avoid the occurrence of pixel crosstalk problems due to lateral conduction of the charge generation layer are disclosed. An organic electroluminescent display panel is provided which comprises: a substrate; an anode layer and a pixel defining layer over the substrate, the pixel defining layer defining pixel units, wherein a recess is provided in the pixel defining layer between adjacent pixel units; a stack of organic electroluminescent units over the anode layer and the pixel defining layer, the stack comprising at least two organic electroluminescent units and a charge generation layer disposed between organic electroluminescent units which are adjacent to each other; a cathode layer over the stack. The corresponding charge generation layers of the adjacent pixel units are disconnected at the recesses. The cathode layer is continuous at the recess.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huifeng WANG, Wang ZHANG, Jingang FANG
  • Patent number: 11765920
    Abstract: The present disclosure relates to an organic electroluminescent display panel, a method of manufacturing the same, and a display device that can alleviate or avoid the occurrence of pixel crosstalk problems due to lateral conduction of the charge generation layer.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: September 19, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huifeng Wang, Wang Zhang, Jingang Fang
  • Patent number: 11559592
    Abstract: A sterilization structure, a sterilization board, and a display device are disclosed. The sterilization structure includes an active layer, wherein, one surface of the active layer has an exposed region, and a material of the active layer includes a laser-induced graphene material.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: January 24, 2023
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Guangyao Li, Luke Ding, Leilei Cheng, Yingbin Hu, Jingang Fang, Ning Liu, Qinghe Wang, Dongfang Wang, Liangchen Yan
  • Patent number: 11537016
    Abstract: A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: December 27, 2022
    Assignees: HEFEI XINSHENG OPTOFT FCTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Leilei Cheng, Jingang Fang, Luke Ding, Jun Liu, Wei Li, Bin Zhou
  • Publication number: 20220255038
    Abstract: Provided are a display substrate and a display apparatus. The display substrate includes a base substrate, and an auxiliary cathode structure located on a side of the base substrate, the auxiliary cathode structure including a first conductive layer, an intermediate support layer, and a second conductive layer. In an implementation, a side of the intermediate support layer close to the first conductive layer includes any one or more of first protrusions and first grooves, and a side of the first conductive layer close to the intermediate support layer includes any one or more of second grooves engaged with the first protrusions and second protrusions engaged with the first grooves which are correspondingly disposed.
    Type: Application
    Filed: September 22, 2021
    Publication date: August 11, 2022
    Inventors: Qinghe WANG, Jun CHENG, Tongshang SU, Ning LIU, Haitao WANG, Yongchao HUANG, Jingang FANG, Liusong NI, Liangchen YAN
  • Patent number: 11342459
    Abstract: The disclosure relates to a thin film transistor structure, an array substrate, and a method for manufacturing a thin film transistor structure. The thin-film transistor structure includes a base substrate, a thin film transistor on the base substrate. Wherein the thin film transistor includes an active layer and a source/drain electrode on a side, facing towards the base substrate, of the active layer. Wherein the source/drain electrode has a protrusion protruding from an edge portion of the active layer in a direction parallel to a surface of the base substrate.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: May 24, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Luke Ding, Zhanfeng Cao, Jingang Fang, Liangchen Yan, Ce Zhao, Dongfang Wang
  • Publication number: 20220077255
    Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate, a display panel and a display device. The array substrate includes: a substrate; a planarization layer on a side of the substrate; a pixel defining layer configured to define a pixel opening region and located on a side of the planarization layer away from the substrate; an anode in the pixel opening region and on a side of the planarization layer away from the substrate. The array substrate further includes an intermediate insulation layer between the planarization layer and the pixel defining layer. The intermediate insulation layer has a chemical polarity between a chemical polarity of the planarization layer and a chemical polarity of the pixel defining layer.
    Type: Application
    Filed: November 5, 2020
    Publication date: March 10, 2022
    Inventors: Wei Li, Jingjing XIA, Bin Zhou, Yang Zhang, Guangyao Li, Wei Song, Xuanang Wang, Qinghe Wang, Liusong Ni, Jun Liu, Liangchen Yan, Ming Wang, Jingang Fang
  • Publication number: 20220069254
    Abstract: A light-emitting substrate includes; a base, an isolation portion disposed on the base and located in an isolation region located outside a light-emitting region, and a second insulating pattern located in the light-emitting region. The isolation portion includes a first conductive pattern, a second conductive pattern and a first insulating pattern that are sequentially stacked on the base; an orthogonal projection of the first conductive pattern on the base is located within an orthogonal projection of the second conductive pattern on the base; and a side face of the first conductive pattern proximate to the light-emitting region and a corresponding side face of the second conductive pattern proximate to the light-emitting region have a first gap therebetween. A side face of the second insulating pattern proximate to the first insulating pattern and a side face of the first insulating pattern proximate to the second insulating pattern have a second gap therebetween.
    Type: Application
    Filed: August 4, 2021
    Publication date: March 3, 2022
    Inventors: Jun LIU, Jingang FANG, Yang ZHANG, Tongshang SU, Wei HE, Bin ZHOU, Ning LIU
  • Publication number: 20220020867
    Abstract: A manufacturing method of a display substrate, a display substrate, and a display device. The manufacturing method includes: forming an active layer; forming a gate insulation film layer, a gate film layer and a photoresist film layer; exposing the photoresist film layer to a light and developing the exposed photoresist film layer until the developed photoresist film layer has a thickness of 1.8-2.2 ?m and a slope angle not less than 70°; over-etching the gate film layer to form a gate electrode, an orthographic projection of the gate electrode being located within a region of an orthographic projection of the developed photoresist film layer; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer; peeling off the photoresist film layer remaining on a surface of the gate electrode; and performing a conductive treatment to the active layer.
    Type: Application
    Filed: September 30, 2021
    Publication date: January 20, 2022
    Inventors: Jun Liu, Luke Ding, Jingang Fang, Bin Zhou, Leilei Cheng, Wei Li
  • Patent number: 11189646
    Abstract: A display substrate, a method for manufacturing the same, and a display device are disclosed. The display substrate includes: a base substrate; and a conductive pattern, a first insulating layer and a conductive layer laminated on the base substrate, wherein the first insulating layer has a plurality of first via holes, and the conductive layer includes a signal line, the signal line being electrically connected to the conductive pattern through the plurality of first via holes. The present disclosure may achieve efficient transmission of signals and ensure the display effect of the display device.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: November 30, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Luke Ding, Jingang Fang, Bin Zhou, Ning Liu, Guangyao Li
  • Publication number: 20210367179
    Abstract: The present disclosure relates to an organic electroluminescent display panel, a method of manufacturing the same, and a display device that can alleviate or avoid the occurrence of pixel crosstalk problems due to lateral conduction of the charge generation layer.
    Type: Application
    Filed: August 5, 2021
    Publication date: November 25, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huifeng WANG, Wang ZHANG, Jingang FANG
  • Publication number: 20210327987
    Abstract: A display substrate, a method for manufacturing the same, and a display device are provided. The display substrate includes: a base substrate, and a conductive layer and a passivation layer which are stacked on the base substrate. The display substrate has a peripheral region and a capacitor region, the conductive layer is located in the peripheral region, the conductive layer is used for electrically connecting with an external driving circuit in the display device, a thickness of a part of the passivation layer in the capacitor region is less than a thickness of a part of the passivation layer in the peripheral region, and the capacitor region is provided with a capacitor that charges a pixel unit in the display substrate.
    Type: Application
    Filed: May 6, 2019
    Publication date: October 21, 2021
    Inventors: Jingang Fang, Jun Cheng, Ce Zhao, Luke Ding, Ning Liu
  • Publication number: 20210296406
    Abstract: The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.
    Type: Application
    Filed: May 12, 2020
    Publication date: September 23, 2021
    Inventors: Jingang FANG, Luke DING, Jun LIU, Bin ZHOU, Jun CHENG
  • Patent number: 11114636
    Abstract: The present disclosure relates to an organic electroluminescent display panel, a method of manufacturing the same, and a display device that can alleviate or avoid the occurrence of pixel crosstalk problems due to lateral conduction of the charge generation layer.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: September 7, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Huifeng Wang, Wang Zhang, Jingang Fang
  • Patent number: 11075228
    Abstract: A display substrate, a method for manufacturing the display substrate, and a display device are provided in the present disclosure. The display substrate includes: a substrate; a first insulation layer on the substrate; a first signal line on a side of the first insulation layer distal to the substrate; a second insulation layer covering the first signal line; and a second signal line on a side of the second insulation layer distal to the substrate, the second signal line overlapping with the first signal line at an overlap region. A concave portion is formed in the first insulation layer. At least at the overlap region, the first signal line is in the concave portion.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: July 27, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jingang Fang, Luke Ding