Patents by Inventor Jingbiao Cui

Jingbiao Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230311039
    Abstract: In one aspect, the disclosure relates to filtration layers comprising nanostructures, methods of making the same, and devices incorporating the same. In one aspect, the filtration layers allow for air flow while blocking passage of sub-micron-sized particles including viruses and environmental pollutants. In another aspect, the filtration layers are biocompatible, flexible, stable over a wide temperature range, and compatible with standard disinfection techniques. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present disclosure.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 5, 2023
    Inventor: Jingbiao Cui
  • Patent number: 11227995
    Abstract: A ReRAM device manufactured using 2-D Si2Te3 (silicon telluride) nanowires or nanoplates. The Si2Te3 nanowires exhibit a unique reversible resistance switching behavior driven by an applied electrical potential, which leads to switching of the NWs from a high-resistance state (HRS) to a low-resistance state (LRS). This switched LRS is highly stable unless the opposite potential is applied to switch the resistance back. This provides a new class of resistive switching based on semiconductor rather than dielectric materials. In several embodiments, the polarity of the initially applied potential along the Si2Te3 nanowires defines the switch “on” and “off” directions, which become permanent once set.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: January 18, 2022
    Inventors: Jingbiao Cui, Keyue Wu, Jiyang Chen, Xiao Shen
  • Publication number: 20200127198
    Abstract: A ReRAM device manufactured using 2-D Si2Te3 (silicon telluride) nanowires or nanoplates. The Si2Te3 nanowires exhibit a unique reversible resistance switching behavior driven by an applied electrical potential, which leads to switching of the NWs from a high-resistance state (HRS) to a low-resistance state (LRS). This switched LRS is highly stable unless the opposite potential is applied to switch the resistance back. This provides a new class of resistive switching based on semiconductor rather than dielectric materials. In several embodiments, the polarity of the initially applied potential along the Si2Te3 nanowires defines the switch “on” and “off” directions, which become permanent once set.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 23, 2020
    Inventors: JINGBIAO CUI, KEYUE WU, JIYANG CHEN, XIAO SHEN
  • Publication number: 20130269762
    Abstract: A photovoltaic cell includes nanostructures formed of nanowires on a substrate, where the nanostructures include an array of three dimensional nanotrees or nanobushes with a core-shell structure having a core and one or more shells sequentially formed on the core. The core o f the core-shell structure is formed of a highly conductive metal or semiconductor, and the shell o f the core-shell structure is formed of a metal, semiconductor, or polymer, such that the core-shell structure has substantially large surface and interface area for photon energy harvesting and conversion into electricity.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 17, 2013
    Applicant: Board of Trustees of the University of Arkansas
    Inventor: Jingbiao Cui
  • Patent number: 7049625
    Abstract: A field effect transistor memory cell has a source region, a drain region, a channel region and a gate region, with the channel region extending from the source region to the drain region and being formed from at least one nanowire which has at least one defect such that charges can be trapped in the defects and released from the defects by a voltage applied to the gate region. A memory device built up from such memory cells and a method of manufacturing such memory cells is also disclosed.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: May 23, 2006
    Assignee: Max-Planck-Gesellschaft zur Fonderung der Wissenschaften E.V.
    Inventors: Klaus Kern, Marko Burghard, Jingbiao Cui
  • Publication number: 20040031975
    Abstract: A field effect transistor memory cell has a source region, a drain region, a channel region and a gate region, with the channel region extending from the source region to the drain region and being formed from at least one nanowire which has at least one defect such that charges can be trapped in the defects and released from the defects by a voltage applied to the gate region. A memory device built up from such memory cells and a method of manufacturing such memory cells is also disclosed.
    Type: Application
    Filed: March 17, 2003
    Publication date: February 19, 2004
    Applicant: Max-Planck-Gesellschaft zur Forderung der Wissenschaften E.V., a German corporation
    Inventors: Klaus Kern, Marko Burghard, Jingbiao Cui