Patents by Inventor Jingbo Gao

Jingbo Gao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230258823
    Abstract: A method includes when a first mobile station uploads an observation value, determining whether a tracking station for performing Real-Time Kinematic (RTK) resolution on the first mobile station is included; otherwise, determining a second mobile station that obtains an RTK fixed solution and satisfies a preset condition as a temporary base station; selecting one of the determined temporary base stations as the tracking station for performing RTK resolution on the first mobile station; and performing RTK resolution according to the selected tracking station for performing RTK resolution on the first mobile station. The second mobile station is another mobile station other than the first mobile station. When the tracking station for performing RTK resolution on the first mobile station is not included, a temporary base station is selected for RTK resolution, and the coverage of an RTK service is expanded without adding the tracking station.
    Type: Application
    Filed: June 8, 2022
    Publication date: August 17, 2023
    Inventors: Kongzhe CHEN, Guangyu ZHOU, Jingbo GAO
  • Publication number: 20230168335
    Abstract: A method includes calculating, by a mobile station, a second coordinate according to a first coordinate and a first observation value of a first base station, and a second observation value published by a second base station; and determining, according to the calculated second coordinate, whether there is a deviation in a third coordinate published by the second base station. When there is a deviation in the third coordinate, calculating location information of the mobile station according to the second coordinate and the observation value of the second base station, wherein the first coordinate and the first observation value are information used for calculating the location information of the mobile station before base station is switched. The first base station publishes the coordinate to the mobile station before base station is switched; and the second base station publishes the coordinate to the mobile station after base station is switched.
    Type: Application
    Filed: October 8, 2022
    Publication date: June 1, 2023
    Inventors: Kongzhe CHEN, Guangyu Zhou, Jingbo Gao
  • Publication number: 20220413042
    Abstract: A debug system for debugging a logic design includes an adaptor and a debug station connected to the adaptor. The logic design includes a plurality of design modules. The adaptor is configured to receive an emulation output of the logic design. The emulation output includes a design snapshot of the logic design and input signals to the logic design that both are recorded during an emulation process of the logic design. The debug station is configured to generate, based on the emulation output and a netlist of a design module of the logic design, an emulation history of the design module.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 29, 2022
    Inventors: Tsair-Chin Lin, Jingbo Gao
  • Patent number: 11537504
    Abstract: An efficient and cost-effective method for usage of emulation machine is disclosed, in which a new concept and use model called debug station is described. The debug station methodology lets people run emulation using a machine from one vendor, and debug designs using a machine from another vendor, so long as these machines meet certain criteria. The methodology and its associated hardware hence are called a ‘platform neutral debug station.’ The debug station methodology breaks loose usage of emulation machines, where people can choose the best machine for running a design, and the best machine for debugging, and they do not need to be the same. Unlike the past, where people needed to run emulation and debug a design using same emulator from beginning to the end, the mix-and-match method described herein allows users to use emulators in the most efficient way, and often most cost effective too.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: December 27, 2022
    Assignee: XEPIC CORPORATION LIMITED
    Inventors: Tsair-Chin Lin, Jingbo Gao
  • Publication number: 20220009280
    Abstract: A variable thickness rim structure made of carbon fiber composite includes an outer ply block, that is paved as an outer side of the rim structure; an upper ply block, that is paved as an upper part of an inner side of the rim structure; a lower ply block, that is paved as a lower part of the inner side of the rim structure; a filling ply block, that is paved among the outer ply block, the upper ply block, and the lower ply block, where a first end of the upper ply block and a first end of the lower ply block extend inwards to form an annular connecting flange; a second end of the upper ply block extends upwards and a second end of the lower ply block extends downwards to form a rim ring together with the outer ply block.
    Type: Application
    Filed: June 21, 2021
    Publication date: January 13, 2022
    Applicant: Jilin University
    Inventors: Dengfeng Wang, Wenchao Xu, Yong Wang, Jingbo Gao
  • Patent number: 10909283
    Abstract: A method for receiving a circuit layout including modules in a hierarchical structure. The method includes selecting a module in the hierarchical structure, identifying multiple toggling netlists in the module during multiple clock cycles, grouping the toggling netlists into clusters based on a toggle weight factor, and finding an average toggle weight factor for each cluster. The method includes generating instrument logic to determine a power consumption of the circuit layout based on a number of toggling netlists in each cluster for each clock cycle, and on the average toggle weight factor for each cluster, merging, with a compiler tool, the instrument logic with the circuit layout into an executable file for an emulator tool. The method includes evaluating the power consumption of the circuit layout with the emulator tool; and modifying the circuit layout when the power consumption of the circuit layout exceeds a pre-selected threshold.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: February 2, 2021
    Assignee: Cadence Design Systems, Inc.
    Inventors: Long Wang, Tsair-Chin Lin, Jingbo Gao
  • Publication number: 20200242006
    Abstract: An efficient and cost-effective method for usage of emulation machine is disclosed, in which a new concept and use model called debug station is described. The debug station methodology lets people run emulation using a machine from one vendor, and debug designs using a machine from another vendor, so long as these machines meet certain criteria. The methodology and its associated hardware hence are called a ‘platform neutral debug station.’ The debug station methodology breaks loose usage of emulation machines, where people can choose the best machine for running a design, and the best machine for debugging, and they do not need to be the same. Unlike the past, where people needed to run emulation and debug a design using same emulator from beginning to the end, the mix-and-match method described herein allows users to use emulators in the most efficient way, and often most cost effective too.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 30, 2020
    Inventors: Tsair-Chin Lin, Jingbo Gao
  • Patent number: 10198539
    Abstract: Systems, methods, and products implementing a dynamic register transfer level (DRTL) monitor are disclosed. The DRTL monitor may be rapidly constructed and implemented in one or more emulator devices during the runtime of the emulation of a device under test (DUT). The systems may receive monitor modules and corresponding monitor instances in high level hardware description language and compile the monitor modules and instances to generate a monitor within the one or more emulator devices. The systems may then connect one or more input ports of the monitor to one or more signal sources in the DUT. The systems may further allow removal of the monitor, addition or more monitors, and/or modification of the monitor during the run time of the emulation of the DUT.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: February 5, 2019
    Assignee: Cadence Design Systems, Inc.
    Inventors: Tsair-Chin Lin, Jingbo Gao, Alon Kfir, Long Wang, Wei Zeng, Zhao Li
  • Patent number: 9414385
    Abstract: Disclosed are a data processing method and device, the method includes: a P2P service data access is provided by using the P2P station network interface and an AP service data access is provided by using the soft AP network interface; service data are received, a network interface corresponding to a service type of the received service data is determined, a radio frequency channel corresponding to the determined network interface is determined, and the service data are transmitted by using the determined radio frequency channel.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: August 9, 2016
    Assignee: ZTE Corporation
    Inventor: Jingbo Gao
  • Patent number: 9400858
    Abstract: Essential information for system operations, memory analysis, and design signal analysis is captured while a hardware based verification platform is performing emulation and testing. This recorded information is then accessible via a memory device and can be used to perform offline debugging with a virtual verification machine (VVM). Users can then release the shared resources and run operation commands to control replay of the design test or emulation in offline mode. Users can access any point in time of the recorded emulation in order to perform detailed design analysis and debugging operations. Offline analysis and debugging may include running certain design cycles, rerunning the emulation until the design reaches a certain state, evaluating memory contents in the design, evaluating design signals for any node in the design, etc.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: July 26, 2016
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Tsair-Chin Lin, Jingbo Gao, Yevgen Ryazanov
  • Publication number: 20150271823
    Abstract: Disclosed are a data processing method and device, the method includes: a P2P service data access is provided by using the P2P station network interface and an AP service data access is provided by using the soft AP network interface; service data are received, a network interface corresponding to a service type of the received service data is determined, a radio frequency channel corresponding to the determined network interface is determined, and the service data are transmitted by using the determined radio frequency channel.
    Type: Application
    Filed: April 2, 2014
    Publication date: September 24, 2015
    Inventor: Jingbo Gao
  • Patent number: 8898051
    Abstract: A system and method for selectively capturing and storing emulation data results from a hardware emulation system, which reduces the data bandwidth requirement and the unnecessary consumption of the DRAM memory capacity by uninteresting data. According to one embodiment, a system comprises a trace array for storing one or more frames of data; a first set of hardware control bits that enables the trace array to selectively capture non-continuous windows of data within a frame of data; a data capture card; and a second set of hardware control bits that enables the data capture card to capture a select frame of data from the one or more frames of data stored on the trace array.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: November 25, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Arthur Perry Sarkisian, Jingbo Gao, Tsair-Chin Lin
  • Patent number: 8739090
    Abstract: The present patent document relates a method and apparatus for compressing probe system data in hardware functional verification systems used to verify user logic designs. Such systems can create large amounts of data every data cycle, which can include many bits that do not toggle from one cycle to the next. Compressing such data is possible by arranging the data in bytes and determining which bytes contain bits that have changed. A status byte may be generated that conveys which bytes contain changed bits. Together the status byte and only the bytes that contain changed bits are transmitted to a host workstation, saving bandwidth on the communication interface.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: May 27, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Jingbo Gao, Tsair-Chin Lin
  • Patent number: 8108194
    Abstract: A method of analyzing power consumption for a DUT (device under test) that includes an integrated circuit or an electronic system includes: providing emulation data for states of the DUT in one or more time windows; determining operational mode values from the emulation data and a selection of operational modes that characterize circuit behavior in the one or more time windows; dividing each time window into one or more segments based on at least one power criterion; determining power-activity values for the one or more segments; determining power-consumption values for the one or more segments from the power-activity values; using the power-activity values and the power-consumption values to determine relative power activity across the one or more segments and adjusting the one or more segments to target high power activity over operational modes in the one or more time windows; and saving one or more values for power activity of the DUT in a computer-readable medium.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: January 31, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bing Zhu, Tsair-Chin Lin, Tung-sun Tung, Jingbo Gao
  • Publication number: 20100318338
    Abstract: A system and method for selectively capturing and storing emulation data results from a hardware emulation system, which reduces the data bandwidth requirement and the unnecessary consumption of the DRAM memory capacity by uninteresting data. According to one embodiment, a system comprises a trace array for storing one or more frames of data; a first set of hardware control bits that enables the trace array to selectively capture non-continuous windows of data within a frame of data; a data capture card; and a second set of hardware control bits that enables the data capture card to capture a select frame of data from the one or more frames of data stored on the trace array.
    Type: Application
    Filed: June 11, 2010
    Publication date: December 16, 2010
    Inventors: Arthur Perry Sarkisian, Jingbo Gao, Tsair-Chin Lin
  • Patent number: D940816
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: January 11, 2022
    Inventor: Jingbo Gao
  • Patent number: D945155
    Type: Grant
    Filed: February 14, 2021
    Date of Patent: March 8, 2022
    Inventor: Jingbo Gao
  • Patent number: D963456
    Type: Grant
    Filed: February 21, 2021
    Date of Patent: September 13, 2022
    Inventor: Jingbo Gao
  • Patent number: D970214
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: November 22, 2022
    Inventor: Jingbo Gao
  • Patent number: D970215
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: November 22, 2022
    Inventor: Jingbo Gao