Patents by Inventor Jingbo Li
Jingbo Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250118933Abstract: Examples include techniques to improve signal integrity performance for a 3-connector design. The techniques include mounting a socket connector to a first side of a hot swap backplane such that pins of the first socket connector mirror pins of a second socket connector mounted to a second side of the hot swap backplane. The mirrored pins associated with routing data signals. The socket connector having a housing configured to receive a first plug connector of a cable assembly that has a second plug connector coupled with a processor baseboard socket connector.Type: ApplicationFiled: December 20, 2024Publication date: April 10, 2025Inventors: Kai XIAO, Diego Mauricio CORTES HERNANDEZ, Luz Karine SANDOVAL GRANADOS, Jingbo LI, Raul ALCALA ARREOLA, Quresh BOHRA, Jose Manuel CANTOR GONZALEZ, Fabio RUIZ MOLINA, Carlos Guillermo TERRIQUEZ ARIAS, Adriana LOPEZ INIGUEZ
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Publication number: 20250086352Abstract: A large-scale denudation depth thematic mapping method, which includes: creating a rule for arranging field work point and field work route, a sampling rule, a field observation and recording rule and a mineral processing rule of a research area. Analyzing a target mineral selected at each field work point by using a thermochronology research method and inputting analysis data into a Low-T Thermo software to perform thermal evolution history modeling and denudation depth calculation, so as to obtain a denudation depth at each of the field work points. Drawing a denudation depth isopleth map of the research area according to the denudation depth at each of the field work points; and setting a large-scale standard regional geological map of the research area as a base map. Superimposing the base map and the denudation depth isopleth map to obtain a denudation depth map of the research area.Type: ApplicationFiled: August 19, 2024Publication date: March 13, 2025Applicant: Institute Of Geology, Chinese Academy Of Geological SciencesInventors: Wen CHEN, Jingbo SUN, Bin ZHANG, Shuangfeng ZHAO, Pengfei TIAN, Ruxin DING, Ze SHEN, Wen ZHANG, Zhi LI, Qiuyi DU
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Publication number: 20250037656Abstract: A display substrate includes an underlay substrate and a plurality of pixel unit groups. The plurality of pixel unit groups are located in a display region of the underlay substrate. At least one pixel unit group includes a plurality of sub-pixel groups, wherein at least one sub-pixel group includes a pixel circuit. The pixel circuit includes a first sub-pixel circuit, a second sub-pixel circuit, and a light emitting control sub-circuit. The first sub-pixel circuit and the second sub-pixel circuit are both electrically connected to the light emitting control sub-circuit. The light emitting control sub-circuit is configured to control a first light emitting element electrically connected to the first sub-pixel circuit to emit light, and to control a second light emitting element electrically connected to the second sub-pixel circuit to emit light.Type: ApplicationFiled: October 12, 2024Publication date: January 30, 2025Inventors: Zhidong YUAN, Yongqian LI, Dacheng ZHANG, Jingbo XU, Can YUAN
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Patent number: 12211426Abstract: An image dis play method applied to a display apparatus includes: establishing a correspondence table between a threshold voltage of a sub-pixel and a compensation voltage, the correspondence table including at least one adjustment interval, an adjustment interval including a first and second threshold voltage endpoint values, the first threshold voltage endpoint value being less than the second threshold voltage endpoint value; acquiring a threshold voltage of each sub-pixel; determining an adjustment interval in which the acquired threshold voltage is located according to the corresponding table; acquiring a compensation voltage corresponding to the acquired threshold voltage according to the correspondence table and the determined adjustment interval; and determining, in a case where the display apparatus is to display a black image, a data voltage required by each sub-pixel according to the acquired threshold voltage and the acquired compensation voltage.Type: GrantFiled: September 8, 2021Date of Patent: January 28, 2025Assignees: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Huihui Li, Wenchao Bao, Song Meng, Jingbo Xu
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Patent number: 12205537Abstract: A display device and a driving method thereof. The display device includes a display substrate and at least one optical sensing unit; the display substrate includes a light-emitting region and a plurality of pixel units located in the light-emitting region; wherein the light-emitting region comprises a single-sided light-emitting region and at least one double-sided light-emitting region, and each of the pixel units in the plurality of pixel units comprises a plurality of sub-pixels; and the at least one optical sensing unit corresponds to the at least one double-sided light-emitting region from a non-display side of the display substrate, and configured to sense light emitted by the sub-pixels during operation in the at least one double-sided light-emitting region, and to provide sensing brightness information of the at least one double-sided light-emitting region to perform brightness compensation on the light-emitting region.Type: GrantFiled: December 21, 2021Date of Patent: January 21, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Mingi Chu, Ying Han, Song Meng, Fei Yang, Lirong Wang, Zhiqiang Dong, Tianji Li, Jingbo Xu, Pan Li
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Publication number: 20240418876Abstract: Embodiments of the present disclosure provides a photon counting detector. The photon counting detector may include a crystal including a crystal cathode, a support, a conductive layer electrically connected to the crystal cathode, and a compression structure that is connected to the support and presses one side of the conductive layer on at least a portion of a surface of the crystal cathode.Type: ApplicationFiled: June 19, 2024Publication date: December 19, 2024Applicant: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.Inventors: Jingbo LI, Zhen NIE
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Publication number: 20230318211Abstract: Methods and apparatus relating to liquid-proof edge connector solutions for immersion cooling are described. In one embodiment, a seal prevents a cooling liquid to cause electrical contact with a pin of an edge card to be inserted in a connector. And, an adhesive prevents the cooling liquid to cause electrical contact with a terminal of the connector. Other embodiments are also claimed and disclosed.Type: ApplicationFiled: April 3, 2023Publication date: October 5, 2023Applicant: Intel CorporationInventors: Xiang Li, Shaohua Li, Jingbo Li, Mo Liu, Kai Xiao, Kai Wang
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Publication number: 20230246888Abstract: Embodiments of the present disclosure may relate to a controller coupled to a re-driver, where the controller has one or more sensor ports to couple with sensor devices, with circuitry coupled with the sensor ports and a re-driver port to receive operational data from the sensor ports, and based on the received operational data identify an indication of a re-driver equalizer setting to be transmitted to the re-driver device. Embodiments are used to increase the stability of the re-driver and maintain link margins a crossed varied operational conditions of the re-driver. Other embodiments may be described and/or claimed.Type: ApplicationFiled: July 15, 2020Publication date: August 3, 2023Inventors: Yang Wu, Howard Heck, Jingbo Li, Tao Xu
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Publication number: 20230098095Abstract: The present disclosure provides a photodiode based on a stannous selenide sulfide nanosheet/GaAs heterojunction and a preparation method and use thereof. The photodiode comprises a structure of the stannous selenide sulfide nanosheet/GaAs heterojunction, forming Au electrodes through thermal vapor deposition on the stannous selenide sulfide nanosheet and GaAs, respectively, and conducting an annealing treatment in a protective gas at a temperature in a range of 150-250° C. The heterojunction is formed by transferring the stannous selenide sulfide nanosheet to a GaAs window, and the GaAs window is obtained by depositing a medium layer film on GaAs and etching the medium layer through lithography and an etchant.Type: ApplicationFiled: August 17, 2022Publication date: March 30, 2023Inventors: Wei GAO, Ying HUANG, Mengmeng YANG, Jingbo LI
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Publication number: 20230046581Abstract: An apparatus and method for reducing differential cross-talk in a pin arrangement of a socket are described. Socket pins within a differential pair use a modified shape to tighten the intra-pair pin coupling to reduce the crosstalk without changing the pin map. The middle vertical segment of one pin of a diagonally adjacent differential pin pair is modified to be closer to the other pin than other corresponding locations of the pins. The spring beam that extends from the middle vertical segment of the one pin is modified to accommodate the package landing pad that the spring beam contacts to maintain a uniform pitch.Type: ApplicationFiled: April 25, 2022Publication date: February 16, 2023Inventors: Xiang Li, Shaohua Li, Landon Hanks, Kai Xiao, Mo Liu, Jingbo Li
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Publication number: 20220336986Abstract: Methods and apparatus relating to a gold finger design for differential edge cards are described. In one embodiment, a signal finger comprises a first portion to communicate electrical signals between a signal pin of a card connector and a card; and a second portion to provide a mechanical wiping surface for the signal pin. Other embodiments are also claimed and disclosed.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Applicant: Intel CorporationInventors: Xiang Li, Howard Heck, Jingbo Li
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Patent number: 11276911Abstract: In accordance with embodiments disclosed herein, there is provided a high-density low-loss cable and connector assembly. A cable assembly includes a first cable connector, a bulk cable section, and a first cable transition section. The bulk cable section includes a first plurality of conductive wires of a first wire thickness. The first cable transition section includes a second plurality of conductive wires that has a first distal end connected to the bulk cable section and a second distal end connected to the first cable connector. Each of the second plurality of conductive wires transitions from the first wire thickness at the first distal end to a second wire thickness that is less than the first wire thickness at the second distal end. Each of the second plurality of conductive wires in the first distal end is connected to a corresponding conductive wire of the first plurality of conductive wires.Type: GrantFiled: October 18, 2018Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Jingbo Li, Kai Xiao, Howard Heck, Kai Wang
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Publication number: 20220069497Abstract: An apparatus includes a rigid housing, a first connector coupled to the housing, the first connector to receive an edge connector of an input/output (I/O) device, and a second connector coupled to the housing, the second connector to couple to an edge connector socket. Pairs of electrical connection pins of the first connector are coupled to respective pairs of electrical connection pins of the second connector via shielded differential cables inside the housing.Type: ApplicationFiled: November 11, 2021Publication date: March 3, 2022Applicant: Intel CorporationInventors: Xiang Li, Anthony M. Constantine, Jingbo Li
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Publication number: 20220021139Abstract: In one embodiment, a card edge connector includes a housing including a slot to receive a first circuit board. A first plurality of pins extend from within the slot through a bottom of the housing. Each of the first plurality of pins includes a first end to mate with a corresponding contact of the first circuit board and a second end to mate with a corresponding one of a first plurality of contacts of a second circuit board, the second end including a heel portion and a toe portion extending from the heel portion in a direction away from a centerline of the slot. A second plurality of pins extend from within the slot through the bottom of the housing.Type: ApplicationFiled: September 24, 2021Publication date: January 20, 2022Inventors: Xiang Li, Shaohua Li, Kai Xiao, Mo Liu, Jingbo Li
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Publication number: 20210399764Abstract: An apparatus comprises a crosstalk cancelation circuit comprising a plurality of taps to output signals based on a signal transmitted via a first data line; and a summation circuit to combine a signal received by a second data line with the signals output by the plurality of taps to reduce near-end crosstalk present in the signal received by the second data line.Type: ApplicationFiled: September 1, 2021Publication date: December 23, 2021Applicant: Intel CorporationInventors: Jingbo Li, Beom-Taek Lee, Jong-Ru Guo, Yunhui Chu, Chunfei Ye, Kai Xiao
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Patent number: 11194751Abstract: An apparatus, such as a re-driver, can include a receiver port coupled to a first link partner across a first link; a transmitter port coupled to a second link partner across a second link; and a power management (PM) controller implemented in hardware. The PM controller can detect a PM control signal, determine a PM state for the apparatus based on the PM control signal, and cause the apparatus to enter the PM state. The apparatus can transmit electrical signals to the second link partner based on the PM state. The PM management control signal can include a clock request, an electrical idle, a common mode voltage, or other electrical signal indicative of a PM link state change of a link partner coupled to the re-driver.Type: GrantFiled: July 16, 2019Date of Patent: December 7, 2021Assignee: Intel CorporationInventors: Huimin Chen, Jingbo Li, Kai Xiao, Yong Yang, Chunfei Ye
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Publication number: 20210311120Abstract: An apparatus may comprise a skew detection circuit to sample a common mode voltage of a differential signal, wherein the sampled common mode voltage is indicative of an amount of skew between a first signal of the differential signal and a second signal of the differential signal; and a skew compensation circuit to adjust a delay of the first signal or the second signal based on the sampled common mode voltage to reduce the amount of skew.Type: ApplicationFiled: June 21, 2021Publication date: October 7, 2021Applicant: Intel CorporationInventors: Jong-Ru Guo, Jingbo Li, Xiaoning Ye, Zuoguo Wu, Howard L. Heck
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Publication number: 20210203094Abstract: In one embodiment, a card edge connector includes: a housing having an opening into which a first circuit board is to be inserted; a plurality of pins each having a first end and a second end, the plurality of pins extending from within the opening through a bottom surface of the housing, the first end of the first plurality of pins to mate with a corresponding contact of the first circuit board; and a plurality of ball grid array (BGA) solder balls each adapted at the second end of a corresponding one of the plurality of pins, the plurality of pins to mate with a corresponding conductive area of a second circuit board to which the card edge connector mates via the plurality of BGA solder balls. Other embodiments are described and claimed.Type: ApplicationFiled: March 16, 2021Publication date: July 1, 2021Inventors: Xiang Li, Mo Liu, Shaohua Li, Jingbo Li, Kai Xiao
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Patent number: 10965047Abstract: Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.Type: GrantFiled: June 4, 2019Date of Patent: March 30, 2021Assignee: Intel CorporationInventors: Jong-Ru Guo, Yunhui Chu, Jun Liao, Kai Xiao, Jingbo Li, Yuanhong Zhao, Mo Liu, Beomtaek Lee, James A. McCall, Jaejin Lee, Xiaoning Ye, Zuoguo Wu, Xiang Li
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Patent number: D1011319Type: GrantFiled: December 24, 2021Date of Patent: January 16, 2024Assignee: SHENZHEN FUTUIBO TECHNOLOGY CO., LTD.Inventor: Jingbo Li