Abstract: Embodiments provide a scheme for determining the order of read threshold voltages used in a read error recovery operation for a memory system. A controller performs one or more read operations on a memory device using one or more read voltages among a plurality of read voltages in a set order. The controller detects a successful read operation among the one or more read operations. The controller determines one or more credits for the one or more read voltages, respectively, in response to the detected successful read operation. The controller updates the set order based on the determined credits.

Abstract: Embodiments provide a scheme for determining the order of read threshold voltages used in a read error recovery operation for a memory system. A controller performs one or more read operations on a memory device using one or more read voltages among a plurality of read voltages in a set order. The controller detects a successful read operation among the one or more read operations. The controller determines one or more credits for the one or more read voltages, respectively, in response to the detected successful read operation. The controller updates the set order based on the determined credits.

Abstract: Techniques are disclosed for accurately sensing memory cells without having to wait for a voltage that creeps up on word line after a sensing operation to die down. The word line creep up could cause electrons to trap in shallow interface traps of a memory cell, hence impacting its threshold voltage. In one aspect, trapped electrons are removed (e.g., de-trapped) from shallow interface traps of a memory cell using a weak erase operation. Therefore, problems associated with word line voltage creep up are reduced or prevented. Thus, the memory cell can be sensed without waiting, while still providing an accurate result. The weak erase could be part of a sensing operation, but that is not required. For example, the weak erase could be incorporated into the beginning part of a read operation, which provides for a very efficient solution.

Abstract: Techniques are provided for avoiding over-programming which can occur on memory cells connected to a data word line at a source-side of a block of word lines. A gradient in the channel potential is created during a program voltage between the data word line and an adjacent dummy word line. This gradient generates electron-hole pairs which can contribute to over programming, where the over programming is worse at higher temperatures. In one aspect, pass voltages of unselected word lines are set to be relatively lower when the temperature is relatively higher, and when the selected word line is among a set of one or more source-side word lines. On the other hand, the pass voltages are set to be relatively higher when the temperature is relatively higher, and when the selected word line is not among the one or more source-side word lines.

Abstract: Techniques are provided for programming a three-dimensional memory device while minimizing over-programming and program disturb. When a selected word line is at the source-side of a set of word lines, a channel gradient is created in the channel adjacent to the selected word line when a program voltage is applied. The gradient generates hot carriers which can cause over-programming of memory cells connected to the selected word line. To reduce the amount of hot carriers, a ramp rate and/or duration of a first step up of the program voltage is reduced. When the selected word line is not at the source-side of the set of word lines, a baseline ramp rate and/or duration can be used. A ramp rate and/or duration of the voltage applied to unselected word lines can be reduced as well but by a lesser amount.