Patents by Inventor JINGJING TAO

JINGJING TAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11920017
    Abstract: A method of a polyurethane foam includes the following steps of: (1) simultaneously pumping a mixed solution prepared from hydrogen peroxide, an organic acid, a catalyst and a stabilizer and a vegetable oil into a first microstructured reactor of a micro-channel modular reaction device for reacting to obtain a reaction solution containing epoxidized vegetable oil; (2) simultaneously pumping the reaction solution containing the epoxidized vegetable oil obtained from the step (1) and a compound of formula III into a second microstructured reactor of the micro-channel modular reaction device for reaction to obtain a vegetable oil polyol; and (3) reacting the vegetable oil polyol prepared from the step (2) with a foam stabilizer, a cyclohexylamine, an isocyanate and a foaming agent cyclopentane for foaming so as to prepare a rigid polyurethane foam.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: March 5, 2024
    Assignee: NANJING TECH UNIVERSITY
    Inventors: Kai Guo, Zheng Fang, Chengkou Liu, Ning Zhu, Jingjing Meng, Junjie Tao, Xin Hu, Xin Li, Chuanhong Qiu, Pingkai Ouyang
  • Patent number: 10839962
    Abstract: A method, system, and computer program product, include obtaining a plurality of training sets of samples and a plurality of testing sets of samples from a data set of clinical records, the plurality of training sets of samples and the corresponding plurality of testing sets of samples including different samples of the data set, determining statistical significance for a plurality of risk factors of a model from the plurality of training sets of samples, determining a plurality of performance metrics of the model from the plurality of testing sets of samples, and determining an evaluation metric of the plurality of risk factors for the model based on the statistical significance and the plurality of performance metrics, the evaluation metric being for improving accuracy of the model.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: November 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gang Hu, Xiang Li, Haifeng Liu, Zhaonan Sun, Jingjing Tao, Guo Tong Xie
  • Publication number: 20180089389
    Abstract: A method, system, and computer program product, include obtaining a plurality of training sets of samples and a plurality of testing sets of samples from a data set of clinical records, the plurality of training sets of samples and the corresponding plurality of testing sets of samples including different samples of the data set, determining statistical significance for a plurality of risk factors of a model from the plurality of training sets of samples, determining a plurality of performance metrics of the model from the plurality of testing sets of samples, and determining an evaluation metric of the plurality of risk factors for the model based on the statistical significance and the plurality of performance metrics, the evaluation metric being for improving accuracy of the model.
    Type: Application
    Filed: September 26, 2016
    Publication date: March 29, 2018
    Inventors: Gang Hu, Xiang Li, Haifeng Liu, Zhaonan Sun, Jingjing Tao, Guo Tong Xie
  • Patent number: 9698799
    Abstract: A phase locked loop frequency calibration circuit and a method are provided. The circuit includes a timer, a counter, a control module, a frequency divider and a voltage controlled oscillator; output of voltage controlled oscillator is connected with first input of frequency divider, output of frequency divider is connected with first input of counter, second input of frequency divider, first input of timer and second input of counter are respectively connected with first output of control module, third input of counter is connected with output of timer, output of counter is connected with first input of control module, a reference clock signal is respectively sent to second input of timer and second input of control module, the number of clocks used by frequency divider to perform frequency division on output clock signal of voltage controlled oscillator is sent to third input of control module.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: July 4, 2017
    Assignee: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
    Inventors: Ruijin Liu, Xu Zhang, Jingjing Tao, Jiejie Lv
  • Patent number: 9564857
    Abstract: A low noise amplifier and a chip. The amplifier includes a biasing circuit unit, a first amplifying circuit unit, a first adjusting unit, a first signal input, a second signal input and a first signal output; the biasing circuit unit includes a first voltage output and a second voltage output; the first amplifying circuit unit includes a first N-type transistor, a first P-type transistor, a first output capacitor, a second output capacitor, a first impedance and a second impedance; gates of first N-type and P-type transistors are connected to first voltage output and first signal input, and second voltage output and first signal input, respectively, via adjusting unit; source of first N-type transistor is connected to source of first P-type transistor and second signal input; drains of first N-type and P-type transistors are connected respectively to impedance, and to first signal output and second signal output via output capacitor.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: February 7, 2017
    Assignee: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
    Inventors: Jingjing Tao, Xu Zhang, Ruijin Liu
  • Publication number: 20160308542
    Abstract: A phase locked loop frequency calibration circuit and a method are provided. The circuit includes a timer, a counter, a control module, a frequency divider and a voltage controlled oscillator; output of voltage controlled oscillator is connected with first input of frequency divider, output of frequency divider is connected with first input of counter, second input of frequency divider, first input of timer and second input of counter are respectively connected with first output of control module, third input of counter is connected with output of timer, output of counter is connected with first input of control module, a reference clock signal is respectively sent to second input of timer and second input of control module, the number of clocks used by frequency divider to perform frequency division on output clock signal of voltage controlled oscillator is sent to third input of control module.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 20, 2016
    Inventors: Ruijin Liu, Xu Zhang, Jingjing Tao, Jiejie Lv
  • Patent number: 9431959
    Abstract: A crystal oscillator, including: a voltage stabilizing unit, a transconductance unit, a feedback resistor, a crystal resonator and at least two ground capacitors. The voltage stabilizing unit includes a current source and a first branch circuit including PMOS and NMOS connected in series, PMOS has its source connected to output of the current source, PMOS and NMOS have their gates connected to drains thereof, and NMOS has its source connected to ground. The transconductance unit includes a second branch circuit including PMOS and NMOS connected in series, PMOS has its source connected to output of the voltage stabilizing unit, PMOS and NMOS have their gates connected to input of the crystal resonator and one end of the resistor, and have their drains connected to output of the crystal resonator and another end of the resistor. The capacitors are connected to two ends of the crystal resonator respectively and ground.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: August 30, 2016
    Assignee: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
    Inventors: Ruijin Liu, Xu Zhang, Jingjing Tao
  • Publication number: 20160112010
    Abstract: A low noise amplifier and a chip. The amplifier includes a biasing circuit unit, a first amplifying circuit unit, a first adjusting unit, a first signal input, a second signal input and a first signal output; the biasing circuit unit includes a first voltage output and a second voltage output; the first amplifying circuit unit includes a first N-type transistor, a first P-type transistor, a first output capacitor, a second output capacitor, a first impedance and a second impedance; gates of first N-type and P-type transistors are connected to first voltage output and first signal input, and second voltage output and first signal input, respectively, via adjusting unit; source of first N-type transistor is connected to source of first P-type transistor and second signal input; drains of first N-type and P-type transistors are connected respectively to impedance, and to first signal output and second signal output via output capacitor.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 21, 2016
    Inventors: JINGJING TAO, XU ZHANG, RUIJIN LIU
  • Publication number: 20160099682
    Abstract: A crystal oscillator, including: a voltage stabilizing unit, a transconductance unit, a feedback resistor, a crystal resonator and at least two ground capacitors. The voltage stabilizing unit includes a current source and a first branch circuit including PMOS and NMOS connected in series, PMOS has its source connected to output of the current source, PMOS and NMOS have their gates connected to drains thereof, and NMOS has its source connected to ground. The transconductance unit includes a second branch circuit including PMOS and NMOS connected in series, PMOS has its source connected to output of the voltage stabilizing unit, PMOS and NMOS have their gates connected to input of the crystal resonator and one end of the resistor, and have their drains connected to output of the crystal resonator and another end of the resistor. The capacitors are connected to two ends of the crystal resonator respectively and ground.
    Type: Application
    Filed: December 10, 2015
    Publication date: April 7, 2016
    Inventors: RUIJIN LIU, XU ZHANG, JINGJING TAO