Abstract: Lithium-utilizing electrochemical cells, providing hybrid battery and capacitor activity, are formed of one or more lithium battery anodes, optionally also including a capacitor electrode, and one or more lithium battery cathodes, optionally with a capacitor electrode, provided that there is at least one capacitor electrode in the hybrid cell and that there are an equal number of electrodes of opposing charge. The respective electrodes are formed of porous layers of one of lithium anode material particles, lithium cathode material particles, or compatible capacitor material particles, formed on one or both sides of a compatible current collector foil. The amounts of active battery and capacitor particles are managed by the thickness of the porous coating layers, and one-side or two-side electrode coatings, to balance the capacities of the battery and capacitor particles to accept and release lithium ions during repeated charging and discharging of the hybrid cell.

Abstract: Technologies for managing a single-producer and single-consumer ring include a producer of a compute node that is configured to allocate data buffers, produce work, and indicate that work has been produced. The compute node is configured to insert reference information for each of the allocated data buffers into respective elements of the ring and store the produced work into the data buffers. The compute node includes a consumer configured to request the produced work from the ring. The compute node is further configured to dequeue the reference information from each of the elements of the ring that correspond to the portion of data buffers in which the produced work has been stored, and set each of the elements of the ring for which the reference information has been dequeued to an empty (i.e., NULL) value. Other embodiments are described herein.

Abstract: A source driving module includes: n data input channels, receiving n data signals from the timing controller; n level shifters, coupled to the n data input channels; n digital to analog converters, coupled to the n level shifters; N switches, divided into N n switch groups, each switch group coupled to the n digital to analog converters; N buffers, divided into N n buffer groups, each buffer group coupled to one of the N n switch groups; a frequency divider, for converting clock signal into switch controlling signal to alternatively switch on the N n switch groups. During a mth period of data transmission, the n data input channels receive data signals of n pixels from the timing controller, and the data signals of n pixels is fed to a mth buffer group via a mth switch group upon receiving the switch controlling signal. The present invention also proposes an LCD panel using the source driving module.

Abstract: The present disclosure relates to a driving circuit and a driving method of liquid crystal panels. The driving circuit includes a timing control chip receiving video signals and analyzing frame turn-on signals and column data voltage signals corresponding to a needed grayscale, calculating a pre-charge time period needed for the subpixels to be displayed in a real-time manner and obtaining pre-charge control signals in accordance with the pre-charge time period. The driving circuit also includes a scanning driving circuit receiving the frame turn-on signals and generating the row-scanning-driving voltage signals, overlapping the pre-charge control signals and the row-scanning-driving voltage signals to obtain the row-scanning-driving signals, and transforming the row-scanning-driving signals into row-scanning-driving voltage, then transmitting the row-scanning-driving voltage to a corresponding scanning line.

Abstract: The present application discloses a liquid crystal panel includes a plurality of gate lines extending in the row direction and are parallel to each other; a plurality of data lines extending in the column direction and are parallel to each other, wherein the gate line and the data line are cross disposed; a sub-pixel is disposed at the intersection of each gate line and each data line; a switching thin-film transistor disposed between each of the odd sub-pixels and the even sub-pixels adjacent to each other on each row; the odd sub-pixels is the sub-pixels located in the odd columns; the even sub-pixels is the sub-pixels located in the even columns; wherein a gate electrode is connected to the corresponding gate line of the previous pixel row, a drain electrode is connected to the corresponding odd sub-pixel, and a source electrode is connected to the corresponding even sub-pixel.

Abstract: The present disclosure provides a picture compression method for the display panel, the method includes: obtaining the number of occluded sub-pixels in the display area; deleting the pixel data having the same number of the occluded sub-pixels; integrated processing the undeleted pixel data, so that the undeleted pixel data are one-to-one correspondence with the un-occluded sub-pixels; providing the integrated processed undeleted pixel data to the un-occluded sub-pixels, so that the aspect ratio of the picture displayed by the un-occluded sub-pixels is as same as the aspect ratio of the picture displayed by the all of the sub-pixels. The present disclosure further provides a picture compression apparatus of the display panel. The disclosure realizes the purpose of the display screen compression, so as to solve the problem that the screen displayed by the display area is not complete due to the covering of the display area by the mechanism frame.

Abstract: The present disclosure provides method for controlling a message signal within a timing controller integrated circuit, the timing controller integrated circuit and a display panel. The method includes: receiving a low voltage differential signaling signal; decoding the low voltage differential signaling signal to obtain a transistor-transistor logic RGB data signal and a control signal, wherein the control signal comprises: a start signal, a horizontal synchronization and a vertical synchronization; processing the transistor-transistor logic RGB data signal to obtain an input RGB data; controlling a timing of the start signal before a timing of the input RGB data; and processing the input RGB data to obtain a mini-low voltage differential signaling data. Therefore, the technical scheme provided by the present disclosure has an advantage of the low cost.

Abstract: The present disclosure discloses a driving circuit for a source driving chip. In the driving circuit for a source driving chip, an output terminal of the blanking timer is connected to a control terminal of the switching unit; an input terminal of the switching unit is connected to a power supply source; an output terminal of the switching unit is connected to a supply terminal of the buffer amplifier. The blanking timer is used to generate a control signal; wherein, the control signal is a first voltage level during a row blanking interval or a frame blanking interval; the control signal is a second voltage level during the row non-blanking interval or the frame non-blanking interval. The driving circuit for a source driving chip of the present disclosure can effectively reduce the power consumption.

Abstract: A driving method for a display panel is disclosed. The method comprises: when the display panel is under a power-on initialization stage, controlling the pixel unit and the data driver to be disconnected, and after the display panel finishes the power-on initialization stage, controlling the pixel unit and the data driver to be connected such that the data driver provides the data signal to drive the display panel. A display panel is also disclosed. Through above way, the preset invention can avoid a flicker phenomenon generated at a power-on moment of the display panel.

Abstract: The present invention provides a liquid crystal display panel. The liquid crystal display panel includes drive circuits, data lines for transmitting the data signals, scan lines, and pixel units. Each of the drive circuits includes a level shifter and an output buffer. Voltage signals which are inputted to a non-inverting input terminal and an inverting input terminal of the level shifter are determined according to a number of inverting amplifiers of the output buffer. The present invention further provides a liquid crystal display device. The present invention can effectively decrease the manufacture cost of the liquid crystal display panel.

Abstract: The present disclosure provides method for controlling a message signal within a timing controller integrated circuit, the timing controller integrated circuit and a display panel. The method includes: receiving a low voltage differential signaling signal; decoding the low voltage differential signaling signal to obtain a transistor-transistor logic RGB data signal and a control signal, wherein the control signal comprises: a start signal, a horizontal synchronization and a vertical synchronization; processing the transistor-transistor logic RGB data signal to obtain an input RGB data; controlling a timing of the start signal before a timing of the input RGB data; and processing the input RGB data to obtain a mini-low voltage differential signaling data. Therefore, the technical scheme provided by the present disclosure has an advantage of the low cost.

Abstract: A source driving module includes: n data input channels, receiving n data signals from the timing controller; n level shifters, coupled to the n data input channels; n digital to analog converters, coupled to the n level shifters; N switches, divided into N n switch groups, each switch group coupled to the n digital to analog converters; N buffers, divided into N n buffer groups, each buffer group coupled to one of the N n switch groups; a frequency divider, for converting clock signal into switch controlling signal to alternatively switch on the N n switch groups. During a mth period of data transmission, the n data input channels receive data signals of n pixels from the timing controller, and the data signals of n pixels is fed to a mth buffer group via a mth switch group upon receiving the switch controlling signal. The present invention also proposes an LCD panel using the source driving module.

Abstract: The present disclosure discloses a driving circuit for a source driving chip. In the driving circuit for a source driving chip, an output terminal of the blanking timer is connected to a control terminal of the switching unit; an input terminal of the switching unit is connected to a power supply source; an output terminal of the switching unit is connected to a supply terminal of the buffer amplifier. The blanking timer is used to generate a control signal; wherein, the control signal is a first voltage level during a row blanking interval or a frame blanking interval; the control signal is a second voltage level during the row non-blanking interval or the frame non-blanking interval. The driving circuit for a source driving chip of the present disclosure can effectively reduce the power consumption.

Abstract: The present invention provides a liquid crystal display panel. The liquid crystal display panel includes drive circuits, data lines for transmitting the data signals, scan lines, and pixel units. Each of the drive circuits includes a level shifter and an output buffer. Voltage signals which are inputted to a non-inverting input terminal and an inverting input terminal of the level shifter are determined according to a number of inverting amplifiers of the output buffer. The present invention further provides a liquid crystal display device. The present invention can effectively decrease the manufacture cost of the liquid crystal display panel.

Abstract: A driving method for a display panel is disclosed. The method comprises: when the display panel is under a power-on initialization stage, controlling the pixel unit and the data driver to be disconnected, and after the display panel finishes the power-on initialization stage, controlling the pixel unit and the data driver to be connected such that the data driver provides the data signal to drive the display panel. A display panel is also disclosed. Through above way, the preset invention can avoid a flicker phenomenon generated at a power-on moment of the display panel.

Abstract: The present invention provides a level shift circuit and a level shift method for a GOA structure liquid crystal panel. The level shift chip (20) comprises a time delay calculation register module (201) and a start signal line (30) and an Inter-Integrated Circuit bus (40) are employed to communicatively couple the sequence controller (10) and the level shift chip (20).

Abstract: A display panel and a driving method for the same are disclosed. The display panel includes gate lines, data lines, gate driver, and data driver. The gate lines and the data lines define multiple pixel areas. Each pixel electrode correspondingly connects with one gate line and one data line. Pixel areas connected with a same gate line allow lights having a same color to pass through. When displaying a picture, the gate driver sequentially drives the multiple gate lines, and the data driver applies a same gamma voltage on the pixel areas connected with the same gate line. The present invention can drive the display panel by a lower hardware cost such that light transmittance rates of sub-pixels corresponding to different colors when same grayscale voltages are applied are the same.

Abstract: The present disclosure relates to a driving circuit and a driving method of liquid crystal panels. The driving circuit includes a timing control chip receiving video signals and analyzing frame turn-on signals and column data voltage signals corresponding to a needed grayscale, calculating a pre-charge time period needed for the subpixels to be displayed in a real-time manner and obtaining pre-charge control signals in accordance with the pre-charge time period. The driving circuit also includes a scanning driving circuit receiving the frame turn-on signals and generating the row-scanning-driving voltage signals, overlapping the pre-charge control signals and the row-scanning-driving voltage signals to obtain the row-scanning-driving signals, and transforming the row-scanning-driving signals into row-scanning-driving voltage, then transmitting the row-scanning-driving voltage to a corresponding scanning line.