Patents by Inventor Jingkui Shi

Jingkui Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10497642
    Abstract: The present disclosure relates to an integrated power semiconductor packaging apparatus and a power converter containing the integrated power semiconductor packaging apparatus. The integrated power semiconductor packaging apparatus comprises a plurality of power semiconductor devices and an electrically insulative substrate formed integrally. The electrically insulative substrate comprises a flat surface, at least one separation wall protruding from the flat surface and a flow channel inside the electrically insulative substrate. The at least one separation wall is configured to separate the flat surface into a plurality of flat areas, and each of the plurality of flat areas is configured to receive one of the plurality of power semiconductor devices. The flow channel is configured for allowing a coolant flowing through to remove heat from the plurality of power semiconductor devices.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: December 3, 2019
    Assignee: General Electric Company
    Inventors: Saijun Mao, Bo Qu, Jingkui Shi, He Xu, Jie Shen, Lin Lan, Rui Li, Zhihui Yuan, Alistair Martin Waddell, Stefan Schroeder, Marius Michael Mechlinski, Mark Aaron Chan
  • Patent number: 10389230
    Abstract: The present disclosure relates to a snubber circuit which comprises a static snubber unit, connected in parallel with the switch, for balancing a static voltage sharing across a switch when the switch is in a state of turn-on or turn-off; and a dynamic snubber unit for balance a dynamic voltage sharing across the switch when the switch is in a process of turn-on or turn-off, comprising a dynamic voltage sharing capacitor connected in parallel with the switch and having a relationship between a capacitance and a voltage of the dynamic voltage sharing capacitor; and a controller for controlling the capacitance of the dynamic voltage sharing capacitor to be in a predetermined working area of capacitance rising while the voltage across the switch is increasing. The present disclosure also relates to a power semiconductor device.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: August 20, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Saijun Mao, Stefan Schroeder, Jingkui Shi, He Xu, Marius Michael Mechlinski, Bo Qu, Zhihui Yuan, Yingqi Zhang, Jie Shen
  • Publication number: 20190207599
    Abstract: Embodiments of the present disclosure relate to a detection device for a circuit comprising a plurality of switch devices coupled in series. The detection device comprises a plurality of detecting circuits, wherein each detecting circuit is integrated with a gate driver of a corresponding switch device. Each detecting circuit comprises a voltage divider and a signal processor. The voltage divider is coupled in parallel with the corresponding switch device and comprises a plurality of voltage dividing components coupled in series. The signal processor is coupled with one of the voltage dividing components and configured to receive a divided voltage across the voltage dividing component and output an output signal indicating the voltage across the switch device. Embodiments of the present disclosure also relate to a system and method for protecting series-connected switch devices.
    Type: Application
    Filed: December 18, 2018
    Publication date: July 4, 2019
    Inventors: Marius Mechlinski, Zhihui Yuan, Jingkui Shi, Stefan Schroeder
  • Publication number: 20190089350
    Abstract: The present disclosure relates to a method for controlling voltage balance of a serialized power switching device, comprising generating a reference voltage based on actual individual voltage of each switch of the serialized power switching device or setting a reference voltage based on supplied voltage to the serialized power switching device; determining an individual blocking voltage mismatch of at least one switch when existing a difference between the reference voltage and the actual individual voltage of at least one switch, wherein the individual voltage mismatch is based on the difference between the reference voltage and the actual individual voltage; calculating an individual delay mismatch for the at least one switch; and compensating the individual delay mismatch for the at least one switch. The present disclosure also relates to a system for controlling voltage balance of a serialized power switching device. The present disclosure also relates to a power switching device.
    Type: Application
    Filed: August 31, 2018
    Publication date: March 21, 2019
    Inventors: Bo QU, Ying ZHANG, Marius Michael MECHLINSKI, Saijun MAO, Jingkui SHI, He XU, Zhihui YUAN, Jie SHEN, Stefan SCHROEDER
  • Publication number: 20180342349
    Abstract: An integrated system for signal and power transmission with galvanic isolation is disclosed. The integrated system comprises an insulative layer having a primary side and a secondary side; a planar signal transformer and a planar power transformer for signal and power transmission between the primary and the secondary sides of the insulative layer respectively. The planar signal transformer comprises two signal coupling elements which are disposed on the primary and the secondary sides of the insulative layer respectively. The planar power transformer includes two power coupling elements which are disposed on the primary and the secondary sides of the insulative layer respectively. Each of the two signal coupling elements and the two power coupling elements is embedded in at least one layer of a multi-layer printed circuit board. The integrated system of the present disclosure has a compact structure and is suitable for automatic assembly and manufacturing.
    Type: Application
    Filed: May 23, 2018
    Publication date: November 29, 2018
    Inventors: Saijun Mao, Bo Qu, Jingkui Shi, He Xu, Jie Shen, Tingting Song, Zhihui Yuan, Xin Jiang, Xi Lu, Stefan Schroeder, Marius Michael Mechlinski
  • Publication number: 20180337109
    Abstract: The present disclosure relates to an integrated power semiconductor packaging apparatus and a power converter containing the integrated power semiconductor packaging apparatus. The integrated power semiconductor packaging apparatus comprises a plurality of power semiconductor devices and an electrically insulative substrate formed integrally. The electrically insulative substrate comprises a flat surface, at least one separation wall protruding from the flat surface and a flow channel inside the electrically insulative substrate. The at least one separation wall is configured to separate the flat surface into a plurality of flat areas, and each of the plurality of flat areas is configured to receive one of the plurality of power semiconductor devices. The flow channel is configured for allowing a coolant flowing through to remove heat from the plurality of power semiconductor devices.
    Type: Application
    Filed: May 17, 2018
    Publication date: November 22, 2018
    Inventors: Saijun MAO, Bo QU, Jingkui SHI, He XU, Jie SHEN, Lin LAN, Rui LI, Zhihui YUAN, Alistair Martin WADDELL, Stefan SCHROEDER, Marius Michael MECHLINSKI, Mark Aaron CHAN
  • Publication number: 20180287487
    Abstract: The present disclosure relates to a snubber circuit which comprises a static snubber unit, connected in parallel with the switch, for balancing a static voltage sharing across a switch when the switch is in a state of turn-on or turn-off; and a dynamic snubber unit for balance a dynamic voltage sharing across the switch when the switch is in a process of turn-on or turn-off, comprising a dynamic voltage sharing capacitor connected in parallel with the switch and having a relationship between a capacitance and a voltage of the dynamic voltage sharing capacitor; and a controller for controlling the capacitance of the dynamic voltage sharing capacitor to be in a predetermined working area of capacitance rising while the voltage across the switch is increasing. The present disclosure also relates to a power semiconductor device.
    Type: Application
    Filed: February 23, 2018
    Publication date: October 4, 2018
    Inventors: Saijun Mao, Stefan Schroeder, Jingkui Shi, He Xu, Marius Michael Mechlinski, Bo Qu, Zhihui Yuan, Yingqi Zhang, Jie Shen