Patents by Inventor Jingkui Zheng

Jingkui Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960739
    Abstract: The present disclosure is directed to a reference voltage calibration. An apparatus includes a memory and a memory controller including a calibration circuit configured to perform a reference voltage calibration to determine a reference voltage used to distinguish between logic values read from the memory. The reference voltage calibration comprises performing horizontal calibrations at different reference voltage values to determine a range of delay values applied to a data strobe signal at which valid data is read from the memory. The calibration includes determining scores corresponding to ones of the plurality of horizontal calibrations in which a score for a particular one of the plurality of horizontal calibrations is based on a corresponding range of delay values and a reference voltage margin. Thereafter, the calibration circuit selects a calibrated reference voltage based on the scores corresponding to ones of the plurality of horizontal calibrations.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: April 16, 2024
    Assignee: Apple Inc.
    Inventors: Robert E. Jeter, Jingkui Zheng, David A. Knopf, Satish B. Dulam, Kai Lun Hsiung, Venkata Ramana Malladi, Rahul Ranjan
  • Publication number: 20240078029
    Abstract: Memory calibration with a margin check is disclosed. A memory subsystem includes a memory and a memory controller coupled to the memory. The memory controller includes a calibration circuit configured to perform, during an initialization process, horizontal memory calibrations for ones of a plurality of performance states and to determine and store, in a storage circuit, information indicative of a set of differences between calibration results for pairs of the plurality of performance states. The memory controller is further configured to, subsequent to the initialization process and in response to a change from a first one of the plurality of performance states to a second one of the plurality of performance states set initial memory parameters for the second performance state based on the set of differences. Thereafter, operation begins in the second performance state without performing an initial horizontal calibration.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Robert E. Jeter, Jingkui Zheng, Ritesh J. Shah, Veera Chockalingam, Naveen Kumar Korada