Patents by Inventor Jingli Yuan

Jingli Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11776152
    Abstract: Provided is a mobile apparatus obstacle detection system (100), a mobile apparatus (10) carrying the obstacle detection system (100), and a ground-sweeping robot. The obstacle detection system (100) comprises: a structured light projection module (102) configured to project structured light onto the path of advance of the mobile apparatus (10), the structured light comprising at least one lateral detection line in the horizontal direction and at least one longitudinal detection line in the vertical direction; a camera module (103) configured to capture an image of the structured light (105); and an image processing module (104) configured to calculate, according to the image of the structured light (105), the distances and positions of obstacles (106, 107, 108) on the path of advance.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: October 3, 2023
    Assignee: JIAXING UPHOTON OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chenhao Dou, Qingfeng Zhu, Jingli Yuan
  • Publication number: 20230186507
    Abstract: Provided is a mobile apparatus obstacle detection system (100), a mobile apparatus (10) carrying the obstacle detection system (100), and a ground-sweeping robot. The obstacle detection system (100) comprises: a structured light projection module (102) configured to project structured light onto the path of advance of the mobile apparatus (10), the structured light comprising at least one lateral detection line in the horizontal direction and at least one longitudinal detection line in the vertical direction; a camera module (103) configured to capture an image of the structured light (105); and an image processing module (104) configured to calculate, according to the image of the structured light (105), the distances and positions of obstacles (106, 107, 108) on the path of advance.
    Type: Application
    Filed: May 10, 2021
    Publication date: June 15, 2023
    Inventors: Chenhao DOU, Qingfeng ZHU, Jingli YUAN
  • Patent number: 8334602
    Abstract: Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: December 18, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Seok Kang, Young Do Kweon, Hong Won Kim, Jingli Yuan
  • Patent number: 8273660
    Abstract: A method of manufacturing a dual face package, including: preparing an upper substrate composed of an insulating layer including a post via-hole; forming a filled electrode in a semiconductor substrate, the filled electrode being connected to a die pad; applying an adhesive layer on one side of the semiconductor substrate including the filled electrode, and attaching the upper substrate to the semiconductor substrate; cutting another side of the semiconductor substrate in a thickness direction, thus making the filled electrode into a through-electrode; and forming a post electrode in the post via-hole, forming an upper redistribution layer connected to the post electrode of the semiconductor substrate, and forming a lower redistribution layer connected to the through-electrode on the other side of the semiconductor substrate.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: September 25, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Wook Park, Young Do Kweon, Jingli Yuan, Seon Hee Moon, Ju Pyo Hong, Jae Kwang Lee
  • Patent number: 8093705
    Abstract: A dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected to the through-electrode, an insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side thereof and connected to the post electrode, and an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: January 10, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Wook Park, Young Do Kweon, Jingli Yuan, Seon Hee Moon, Ju Pyo Hong, Jae Kwang Lee
  • Publication number: 20110129994
    Abstract: A method of manufacturing a dual face package, including: preparing an upper substrate composed of an insulating layer including a post via-hole; forming a filled electrode in a semiconductor substrate, the filled electrode being connected to a die pad; applying an adhesive layer on one side of the semiconductor substrate including the filled electrode, and attaching the upper substrate to the semiconductor substrate; cutting another side of the semiconductor substrate in a thickness direction, thus making the filled electrode into a through-electrode; and forming a post electrode in the post via-hole, forming an upper redistribution layer connected to the post electrode of the semiconductor substrate, and forming a lower redistribution layer connected to the through-electrode on the other side of the semiconductor substrate.
    Type: Application
    Filed: February 3, 2011
    Publication date: June 2, 2011
    Applicant: Samsung Electro Mechanics Co., Ltd.
    Inventors: Seung Wook Park, Young Do Kweon, Jingli Yuan, Seon Hee Moon, Ju Pyo Hong, Jae Kwang Lee
  • Publication number: 20100320624
    Abstract: Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized.
    Type: Application
    Filed: August 25, 2009
    Publication date: December 23, 2010
    Inventors: Joon Seok KANG, Young Do Kweon, Hong Won Kim, Jingli Yuan
  • Patent number: 7737687
    Abstract: A fluxgate sensor includes a magnetic core including CoNbZr, an excitation coil, and a magnetic field sensing coil. The fluxgate sensor can use CoNbZr. A low coercivity and high magnetic permeability can be obtained.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: June 15, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-won Na, Jingli Yuan, Sang-on Choi
  • Publication number: 20100102426
    Abstract: Disclosed herein is a dual face package and a method of manufacturing the same. The dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected to the through-electrode, an insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side thereof and connected to the post electrode, and an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode. The dual face package is produced by a simple process and is applicable to a large diameter wafer level package.
    Type: Application
    Filed: January 22, 2009
    Publication date: April 29, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Wook Park, Young Do Kweon, Jingli Yuan, Seon Hee Moon, Ju Pyo Hong, Jae Kwang Lee
  • Patent number: 7696004
    Abstract: Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: April 13, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jingli Yuan, Jae Cheon Doh, Si Joong Yang, In Goo Kang, Seung Wook Park
  • Publication number: 20090253259
    Abstract: Disclosed are a solder attachment jig and a method of manufacturing a semiconductor device using the same. The solder ball attachment jig, which arranges a solder ball to be aligned with a conductive post of a semiconductor wafer, can include a body and a receiving hole, which is formed on the body to hold the solder ball. Internal walls of the receiving hole that face each other are symmetrically inclined. Using the solder ball attachment jig in accordance with an embodiment of the present invention, the alignment of the solder ball can be improved while reducing the cost and simplifying the processes.
    Type: Application
    Filed: August 20, 2008
    Publication date: October 8, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Jingli Yuan, Young-Do Kweon, Jae-Kwang Lee, Jong-Hwan Baek, Hyung-Jin Jeon, Seung-Wook Park
  • Patent number: 7571533
    Abstract: A method of manufacturing a micro flux gate sensor and a micro flux gate sensor manufactured according to the method are provided. The method includes operations of forming a lower coil portion of an excitation coil and a magnetic field detecting coil on a wafer, forming connection portions with a certain height at predetermined positions of the lower coil portion, forming a first insulation layer to cover the lower coil portion and the connection portions, forming a magnetic core on the first insulation layer, forming a second insulation layer to cover the magnetic core and forming an upper coil portion electrically connected to the connection portions to form the excitation coil and the magnetic field detecting coil, and forming a third insulation layer to cover the upper coil portion.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: August 11, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-won Na, Jingli Yuan
  • Publication number: 20090166862
    Abstract: Provided is a semiconductor device including a wafer having an electrode pad; an insulation layer that is formed on the wafer and has an exposure hole exposing the electrode pad; a redistribution layer that is formed on the insulation layer and the exposure hole of the insulation layer and has one end connected to the electrode pad; a conductive post that is formed at the other end of the redistribution layer; an encapsulation layer that is formed on the redistribution layer and the insulation layer such that the upper end portion of the conductive post is exposed; and a solder bump that is formed on the exposed upper portion of the conducive post.
    Type: Application
    Filed: June 18, 2008
    Publication date: July 2, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Do Kweon, Jae Kwang Lee, Jong Hwan Baek, Hyung Jin Jeon, Jingli Yuan
  • Publication number: 20090166859
    Abstract: Provided is a semiconductor device including a wafer having an electrode pad; an insulating layer that is formed on the wafer and has an exposure hole formed in one side thereof, the exposure layer exposing the electrode pad, and a support post formed in the other side, the support post having a buffer groove; a redistribution layer that is formed on the top surface of the insulating layer and has one end connected to the electrode pad and the other end extending to the support post; an encapsulation layer that is formed on the redistribution layer and the insulating layer and exposes the redistribution layer formed on the support post; and a solder bump that is provided on the exposed portion of the redistribution layer.
    Type: Application
    Filed: March 26, 2008
    Publication date: July 2, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jingli Yuan, Young Do Kweon, Jong Hwan Baek, Joon Seok Kang, Seung Wook Park, Jong Yun Lee
  • Publication number: 20090014827
    Abstract: Provided is an image sensor module at the wafer level including a wafer; an image sensor mounted on one surface of the wafer; a wireless communication chip formed outside the image sensor on the one surface of the wafer; and a protective cover installed on the one surface of the wafer.
    Type: Application
    Filed: June 10, 2008
    Publication date: January 15, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chang Hyun Lim, Seog Moon Choi, Dae Jun Kim, Won Kyu Jeung, Jingli Yuan
  • Patent number: 7465747
    Abstract: It is intended to provide novel labeling reagents characterized by having a group capable of binding to a substance to be labeled (for example, a biological substance, a physiologically active substance, etc.), easily forming a complex together with a rare earth ion, the complex being stable in an aqueous solution, and having a sufficient fluorescence intensity and a long fluorescence life time regardless of buffer types; complexes composed of the above labeling reagent with a rare earth ion; fluorescence labels containing the above complex; a fluorescence assay method using the above fluorescent label; etc. Namely, labeling reagents comprising a compound having a 2,2?:6?,2?-tripyridine skeleton or a 2,6-dipyrazolopyridine skeleton and having a group capable of binding to a substance to be labeled (for example, a biological substance, a physiologically active substance, etc.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: December 16, 2008
    Assignees: Tokyo Chemical Industry Co., Ltd.
    Inventors: Kazuko Matsumoto, Jingli Yuan, Guilan Wang, Mingqian Tan
  • Publication number: 20080304821
    Abstract: The present invention relates to a camera module package having flexibility and a method of manufacturing the same. Provided is the camera module package according to the invention including a silicon wafer mounted with the image sensor in the center of a top surface thereof and provided with pads both sides of the image sensor, a lens unit opened to form a convex lens in a mounting portion of the image sensor in an upper part of the wafer, and a flexible board tightly joined to a bottom surface of the wafer and electrically connected to the pads by an internal pattern. The camera module package can be thinly manufactured and since the camera module package has flexibility, the camera module package can be easily attached to a bendable substrate and to the inside an IT apparatus.
    Type: Application
    Filed: May 7, 2008
    Publication date: December 11, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Won Kyu Jeung, Seog Moon Choi, Jingli Yuan, Chang Hyun Lim, Dae Jun Kim
  • Publication number: 20080296714
    Abstract: Provided is a wafer level package of an image sensor capable of simply and easily packaging an image sensor in a packaging process, and a method for manufacturing the same. The wafer level package of an image sensor includes a lower substrate including an image sensor, a conductive pattern coupled to the image sensor, and a plurality of vias coupled to the conductive pattern; a micro lens array film having a plurality of micro lenses corresponding to the image sensor, the micro lenses being formed on the lower substrate; and a sealing line surrounding the image sensor while being spaced apart from the image sensor and being in contact with an upper substrate.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 4, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jingli Yuan, Won Kvu Jeung, Dae Jun Kim, Chang Hyun Lim, Young Do Kweon, Jae Cheon Doh
  • Publication number: 20080299706
    Abstract: Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection.
    Type: Application
    Filed: June 2, 2008
    Publication date: December 4, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jingli Yuan, Jae Cheon Doh, Si Joong Yang, In Goo Kang, Seung Wook Park
  • Publication number: 20080296577
    Abstract: There is provided a camera module package including: a substrate having an image sensor disposed on one surface thereof and a pad electrically connected to the image sensor; a protective cap adhered onto the substrate by an adhesive surrounding the image sensor to seal the image sensor, the protective cap transmitting light; and a supporting part surrounding the protective cap, the supporting part adhering and supporting at least one lens formed corresponding to the image sensor. The camera module package is reduced in thickness and size, and minimized in an error of a focal length between the lens and the image sensor, thereby achieving accuracy and high reliability.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 4, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jingli Yuan, Won Kyu Jeung, Dae Jun Kim, Chang Hyun Lim, Jae Cheon Doh