Abstract: The display substrate includes a shift register arranged on a base substrate, and the shift register includes a plurality of stages of driving circuits; a plurality of stages of the driving circuit are provided in the driving circuit area of the base substrate; a stage of driving circuit area includes a first area and a second area, and the first area is provided with a first type of transistor included in the driving circuit, a second type of transistor included in the driving circuit is provided in the second area; one side of the first area is a side of the power line away from the second area, and the other side of the first area is a side close to the second area of an active layer of the first type of transistor close to the second area.

Abstract: A display panel and a display device are provided. The display panel includes a base substrate, a plurality of pixel drive circuit units, n first signal lines, a touch layer, and a light emitting element. A distance between first extending portions of two adjacent first signal lines is greater than a distance between first bending portions of the two adjacent first signal lines. An orthogonal projection overlap area between the first connecting portion and first extending portions of the n first signal lines is S1, and an orthogonal projection overlap area between the first connecting portion and first bending portions of the n first signal lines is S2. S1?S2. A length of a first extending portion of at least one first signal line is L1, a distance between the first extending portion of at least one first signal line and the second electrode is H1, and H1?(S1/n)/L1.

Abstract: A display panel and a driving method thereof and a display device are provided. The display panel includes a pixel circuit and a light-emitting element, the pixel circuit including a driving transistor, a first reset transistor and a second reset transistor; the first reset transistor configured to reset the gate electrode of the driving transistor, and the second reset transistor configured to reset the first electrode of the light-emitting element; a first initialization signal line connected with the gate electrode of the driving transistor through the first reset transistor; and a first power line. The first reset transistor is a dual-gate transistor and includes a first channel and a second channel which are connected by a first conductive connection portion; an orthographic projection of the first conductive connection portion on the base substrate is completely within an orthographic projection of the first power line on the base substrate.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, a plurality of pixels, a plurality of gate lines and a plurality of data lines, wherein the base substrate has a plurality of transparent regions and a plurality of display regions; the pixels are on the base substrate and within the display regions; each pixel includes a plurality of sub pixels; the sub pixels of each pixel are divided into two rows of sub pixels; the gate lines and the data lines are on the base substrate; the sub pixels of a first pixel are connected with the same gate line; the gate line connected with the sub pixels of the first pixel is between the two rows of sub pixels of the first pixel; and the first pixel is any one of the plurality of pixels.

Abstract: A touch display substrate and a touch display apparatus are provided. The touch display substrate including: a display region and a non-display region, the display region including a first display region and a second display region, the first display region surrounding at least one side of the second display region; the touch display substrate includes a base substrate and a display structure layer and a touch structure layer disposed on the base substrate sequentially; the first display region includes a first touch assembly, and the second display region includes a second touch assembly; the display structure layer includes multiple pixel circuits located in the first display region and multiple light emitting elements located in the first display region and second display region; the first touch assembly is located in the touch structure layer, and the second touch assembly is located in the display structure layer and/or the touch structure layer.

Abstract: A display substrate includes a base substrate including a display area and a peripheral area on at least one side of the display area; a pixel array, located in the display area and including multiple pixel units; and, a scan driving module, located in a driving circuit area of the peripheral area, and including multiple shift register units, multiple signal lines being arranged in one shift register units, and extending along a first direction; wherein a ratio of a sum W1 of widths of the multiple signal lines in a second direction to a width W2 of the shift register unit in the second direction is W1/W2, and a length of at least one pixel unit along the first direction is a pixel pitch value; the first direction intersects the second direction; a product of W1/W2 and the pixel pitch value is greater than 18 um and less than 40 um.

Abstract: The display substrate includes a shift register arranged on a base substrate, and the shift register includes a plurality of stages of driving circuits; a plurality of stages of the driving circuit are provided in the driving circuit area of the base substrate; a stage of driving circuit area includes a first area and a second area, and the first area is provided with a first type of transistor included in the driving circuit, a second type of transistor included in the driving circuit is provided in the second area; one side of the first area is a side of the power line away from the second area, and the other side of the first area is a side close to the second area of an active layer of the first type of transistor close to the second area.

Abstract: A display substrate, including a scan drive control circuit including an input circuit, an output control circuit, and an output circuit; the input circuit is configured to transmit a signal of the signal input terminal to the output control circuit and a signal of the first clock signal terminal or the first voltage terminal to the output control circuit; the output control circuit is configured to store a signal of the first signal terminal, and transmit a signal of the second signal terminal to the first node; or, the output control circuit is configured to store a signal of the second clock signal terminal, and transmit a signal of the second voltage terminal to the first node; the output circuit is configured to output a signal of the first voltage terminal to the signal output terminal, or output the signal of the second voltage terminal to the signal output terminal.

Abstract: Provided are a display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels and gate lines located at the display area; and a gate driving circuit including cascaded multistage gate driving units, one or more stages gate driving units include first and second gate driving sub-circuits spaced apart by pixel driving circuits of a first group of sub-pixels; a gate driving sub-circuit connection line connected to the first and second gate driving sub-circuits. The pixel driving circuit of at least one of the first group of sub-pixels includes: a first pixel driving sub-circuit including a driving transistor including a first active layer; a second pixel driving sub-circuit; a connector located in a different layer from the first active layer and electrically connected to the first and second pixel driving sub-circuits.

Abstract: A display substrate includes a base substrate (100), multiple first pixel circuits (11), multiple second active pixel circuits (12), multiple first light-emitting elements (13), multiple second light-emitting elements (14) and at least one first data line (21). The first data line (21) includes a first sub-data line (211) and a second sub-data line (212). The first sub-data line (211) is electrically connected with the multiple first pixel circuits (11) arranged along a first direction (D1), and the second sub-data line (212) is electrically connected with the multiple second active pixel circuits (12) arranged along the first direction (D1). The first sub-data line (211) and the second sub-data line (212) are electrically connected through a first transfer line (214), and the first transfer line (214) is located in a peripheral region (BB) and between a signal access region (B14) and a display region (AA).

Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, a gate scan driving circuit, a light-emitting control scan driving circuit, a first power line, a first planarization layer, a second planarization layer and a first shielding layer and a second shielding layer. The first planarization layer and the second planarization layer further include an open slot. The second shielding layer extends from a region corresponding to the light-emitting control scan driving circuit to a region corresponding to the gate scan driving circuit and covers the open slot. In an area where the second shielding layer is close to the open slot, an orthographic projection of the second shielding layer covering the open slot on the base substrate at least overlaps with an orthographic projection of the first shielding layer on the base substrate.

Abstract: A display substrate, comprising a base substrate and a scan drive control circuit which is disposed in a non-display area of the base substrate. The scan drive control circuit comprises an input circuit, an output control circuit, and an output circuit. The output control circuit is connected to the input circuit and the output circuit. The output control circuit comprises a first node control capacitor and a second node control capacitor. The length of the first node control capacitor in a first direction LC1k, the length of the second node control capacitor in the first direction LC2k and the length of the scan drive control circuit in the first direction LY satisfy the following formula: L C ? 1 ? k L Y < L C ? 2 ? k L Y ; L C ? 1 ? k L Y < 0.2 .

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

Abstract: Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.

Abstract: A display substrate includes a base substrate including a display region and a frame region, multiple pixel circuits, first light-emitting elements and at least one first data line, located in a first sub-display region, multiple second light-emitting elements located in a second sub-display region. The display region includes a foldable first display region and second display region each including a first sub-display region and second sub-display region; multiple pixel circuits includes multiple first pixel circuits and second pixel circuits distributed among multiple first pixel circuits; at least one first pixel circuits is connected with at least one of multiple-first light-emitting elements; at least one of multiple second pixel circuits is connected with at least one of multiple second light-emitting elements; the first data line at least includes one sub-data line connected with the first pixel circuit and at least includes another sub-data line connected with the second pixel circuit.

Abstract: Provided are a display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels, each sub-pixel including a light-emitting element and a pixel driving circuit; a plurality of gate lines and light-emitting control lines; a gate driving circuit located at the display area and including cascaded multistage gate driving units, one or more stages include gate driving sub-circuits including a first and a second gate driving sub-circuit spaced apart by pixel driving circuits of a first group of sub-pixels; and a light-emitting control driving circuit located at the display area and including cascaded multistage light-emitting control driving units, one or more stages include light-emitting control driving sub-circuits including a first and a second light-emitting control driving sub-circuit spaced apart by pixel driving circuits of a second group of sub-pixels.

Abstract: Provided are a display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels and gate lines located at the display area; and a gate driving circuit including cascaded multistage gate driving units, one or more stages gate driving units include first and second gate driving sub-circuits spaced apart by pixel driving circuits of a first group of sub-pixels; a gate driving sub-circuit connection line connected to the first and second gate driving sub-circuits. The pixel driving circuit of at least one of the first group of sub-pixels includes: a first pixel driving sub-circuit including a driving transistor including a first active layer; a second pixel driving sub-circuit; a connector located in a different layer from the first active layer and electrically connected to the first and second pixel driving sub-circuits.

Abstract: A display panel and a display device are provided, the display panel includes a base substrate and a touch wire including a first sub-portion and a second sub-portion, a main surface of the base substrate is a first surface; the second sub-portion includes a first height portion and a second height portion, a height of the first height portion relative to the first surface is smaller than a height of the second height portion relative to the first surface, line widths of respective positions of the first height portion are inversely proportional to heights of the respective positions of the first height portion relative to the first surface, and line widths of respective positions of at least part of the second height portion are proportional to heights of the respective positions of the at least part of the second height portion relative to the first surface.

Abstract: The disclosure provides a display panel, a method of manufacturing the same, a display device, and an electronic apparatus. The display panel includes a display area and a non-display area, where the display panel further includes: at least one signal bus located in and across the display area; a plurality of metal wires located in the display area and each having an end electrically coupled to the at least one signal bus; and a control circuit located in the non-display area and electrically coupled to another end of each metal wire.

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.