Abstract: A power compensation method and apparatus based on white space optimization and utilization technology comprises: obtaining an available white space channel; and respectively and correspondingly compensating upper adjacent channels and/or lower adjacent channels of the white space channel according to the overlaps between the coverage of a white space device and the coverage of authorized adjacent channels signals, such that the white space device can obtain the maximum number of selectable channels and the maximum transmission power without affecting the authorized signals currently used in the adjacent channels; it is used to respectively enhance the output power of authorized signals in adjacent channels of a white space channel, such that a white space device operating at the white space channel can meet the predetermined requirements of transmission power and coverage without adversely affecting the coverage and reception of authorized signals currently used in the adjacent channels.

Abstract: A method of optimizing the utilization of white space based on the enhancement of the adjacent frequency, comprising: obtaining an available white space channel; and separately and correspondingly compensating an upper adjacent frequency and/or a lower adjacent frequency of the channel according to a relationship between the coverage of authorized signals of adjacent frequencies of the channel and the coverage of a white space device, the white space device obtain the maximum number of selectable channels and the maximum transmission power without affecting the authorized signals currently used in the adjacent frequencies; enhancing emission intensities of TV broadcast signals or other authorized signals of respective adjacent frequencies of a white space channel, a white space device operating over the white space channel meet the predetermined requirements of transmission power and coverage without adversely affecting the coverage and reception of authorized signals currently used in the adjacent frequencie

Abstract: A method and device for eliminating co-frequency and adjacent frequency interference in an analog domain, in the case that a wireless communication device with a receiving antenna, that is, a transmitting point of a master device, detects and judges the presence of co-frequency and/or adjacent frequency interference signal sources on site, collects the reference signals of the same frequency and/or adjacent frequency from the interference signal sources by means of cable direct connection or adding an antenna, and obtains the analog signals of the same frequency and/or adjacent frequency interference after interference signal recovery processing, then, in the analog domain, the received signal received by the receiving antenna of the master device is directly subtracted from the interference analog signal of the same frequency and/or adjacent frequency to complete the analog interference cancellation process, so as to obtain the interference canceled RF analog signal.

Abstract: An echo cancelling system and method for On Channel Repeater (OCR) used for coverage gap filling, which includes: a splitter, an echo cancellation module, a down-conversion module and a digital signal processor (DSP) module, which uses digital signal processing technologies to achieve a precise echo detection/estimation, and to cancel sufficient part of the echoes in analog domain. The invention may also remove residual echoes in digital domain as well, which is considered to be only a great supplement of the echo cancellation operation in analog domain.

Abstract: An echo cancelling system and method for On Channel Repeater (OCR) used for coverage gap filling, which includes: a splitter, an echo cancellation module, a down-conversion module and a digital signal processor (DSP) module, which uses digital signal processing technologies to achieve a precise echo detection/estimation, and to cancel sufficient part of the echoes in analog domain. The invention may also remove residual echoes in digital domain as well, which is considered to be only a great supplement of the echo cancellation operation in analog domain.

Abstract: An equalizer (200A) comprises a feedforward filter (210), wherein the feedforward filter includes a plurality of feedforward filter taps, coefficients are associated with the plurality of feedforward filter taps, and values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined. In some embodiments, the equalizer also comprises a decision feedback equalizer (216).

Abstract: A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.

Abstract: A method of controlling the operation of an equalizer (210, 216), wherein the equalizer is adapted to receive a transmitted signal (76, 78) comprising at least one predetermined sequence of symbols, includes the step of developing a set of samples from a received signal. At least one plurality of samples is identified, wherein the at least one plurality of samples corresponds to the at least one predetermined sequence of symbols. The equalizer is then operated in a selected one of three modes. A first mode is selected if the at least one plurality of samples is identified, wherein the first mode includes the step of developing a signal-to-noise ratio (SNR) (100). A second mode is selected if the at least one plurality of samples is identified and the SNR is greater than a first predetermined threshold. A third mode is selected if the at least one plurality of samples is identified and the SNR is greater than a second predetermined threshold.

Abstract: A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is phase-shifted by a second multiplier, then convolved by a third multiplier. The output of the third multiplier is split, with each portion being passed through a frequency-shift multiplier and a frequency-and-phase lock loop. The output of the two frequency-and-phase lock loops is summed and returned to the VCO to complete the feedback loop.

Abstract: An adaptive equalizer comprises a trellis decoder; a mapper coupled to the output of the trellis decoder; and a decision feedback equalizer coupled to the output of the mapper. Each of the taps receives as input via the mapper output from a different one of the stages of the trellis decoder.

Abstract: A method of controlling the operation of an equalizer (210, 216), wherein the equalizer is adapted to receive a transmitted signal (76, 78) comprising at least one predetermined sequence of symbols, includes the step of developing a set of samples from a received signal. At least one plurality of samples is identified, wherein the at least one plurality of samples corresponds to the at least one predetermined sequence of symbols. The equalizer is then operated in a selected one of three modes. A first mode is selected if the at least one plurality of samples is identified, wherein the first mode includes the step of developing a signal-to-noise ratio (SNR) (100). A second mode is selected if the at least one plurality of samples is identified and the SNR is greater than a first predetermined threshold. A third mode is selected if the at least one plurality of samples is identified and the SNR is greater than a second predetermined threshold.

Abstract: A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.

Abstract: An equalizer (200A) comprises a feedforward filter (210), wherein the feedforward filter includes a plurality of feedforward filter taps, coefficients are associated with the plurality of feedforward filter taps, and values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined. In some embodiments, the equalizer also comprises a decision feedback equalizer (216).

Abstract: An equalizer for processing blocks of data includes n?1 data shifters, n finite filters, an adder, and a controller. Each of the n?1 data shifters shifts the blocks of data. One of the n finite filters applies a corresponding set of finite filter coefficients to the blocks of data, and each of the other n?1 finite filters applies a set of finite filter coefficients to a corresponding output of the n?1 data shifters. Ghosts of the blocks of data are not eliminated as a result of the application of the n sets of finite filter coefficients corresponding to the n finite filters, and n>2. The adder is arranged to add outputs from the n finite filters. The controller is arranged to control the sets of finite filter coefficients corresponding to the n finite filters so that the addition performed by the adder substantially eliminates the ghosts.

Abstract: A data-and-pilot directed frequency-and-phase lock loop for an offset-QAM modulated signal having a pilot signal comprising a pilot acquisition loop and a pair of data-directed acquisition loops. The pilot is extracted from the main signal by a pilot filter, then used both by the pilot acquisition loop and to remove the pilot from the signal to the data-directed acquisition loops. The outputs of the pilot and the two data-directed acquisition loops are summed and returned to the VCO to complete the feedback loop.

Abstract: An equalizer comprises: an FIR; a trellis decoder coupled to the FIR; a mapper coupled to the trellis decoder; and a decision feedback equalizer coupled to the mapper. The decision feedback equalizer receives the mapped and scaled output of the trellis decoder as input and an error signal is generated by subtracting an output of the decision feedback equalizer from the input to the trellis decoder.

Abstract: A compound chirp is provided in a received signal to permit a receiver to synchronize to the received signal. The compound chirp has temporally overlapping up frequency and down frequency components.

Abstract: An adaptive equalizer comprises a decision device; a decision feedback equalizer coupled to the decision device; an FIR filter coupled to the decision device; and a trellis decoder coupled to the decision device, adapted to provide a reliability output and a decoded output. An error signal is generated by subtracting an output of the decision feedback equalizer from an output of the decision device, the error signal being used to update coefficients of the taps of the FIR filter and the decision feedback equalizer. A magnitude of the change to the coefficients is selected based at least in part the reliability output of the trellis decoder.

Abstract: A digital equalizer comprises a matched filter that, in conjunction with an FIR filter, assures a single peak with substantially greater energy than other peaks caused by ghosts, thereby permitting synchronization even with multiple, arbitrarily strong ghosts caused by strong multipathing, multiple transmitters, or both.

Abstract: A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is phase-shifted by a second multiplier, then convolved by a third multiplier. The output of the third multiplier is split, with each portion being passed through a frequency-shift multiplier and a frequency-and-phase lock loop. The output of the two frequency-and-phase lock loops is summed and returned to the VCO to complete the feedback loop.