Patents by Inventor Jingtao Tan

Jingtao Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11915432
    Abstract: Disclosed is a target tracking method and apparatus. The target tracking apparatus includes a processor configured to obtain a first depth feature from a target region image and obtain a second depth feature from a search region image, obtain a global response diagram between the first depth feature and the second depth feature, acquire temporary bounding box information based on the global response diagram, updated the second depth feature based on the temporary bounding box information, obtain local feature blocks based on the first depth feature, obtain a local response diagram based on the local feature blocks and the updated second depth feature, and determine output bounding box information based on the local response diagram.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: February 27, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jingtao Xu, Jiaqian Yu, Byung In Yoo, Chang Kyu Choi, Hyunjeong Lee, Hangkai Tan, Jaejoon Han, Qiang Wang, Yiwei Chen
  • Publication number: 20210171244
    Abstract: The present invention discloses a thermal cup, which includes a cup body with an opening and a cover, a promoter, a sealing ring and a driver. The cover is covered to the opening. The driver is installed on the top face of the cover, the promoter is installed on the bottom face of the cover, when the cover covers at the opening, the promoter is inside the opening, and a gap is formed among the opening, the top wall of the cover and the promoter, the sealing ring is accommodated in the gap. When close the cover, the driver is rotated to bring the promoter to move upwards, the gap is reduced and the sealing ring seals the gap; when open the cover, the driver is rotated to bring the promoter to move downwards, the sealing ring resets to break the sealed connection of the opening and the cover.
    Type: Application
    Filed: December 7, 2019
    Publication date: June 10, 2021
    Inventor: Jingtao TAN
  • Patent number: 9001535
    Abstract: A control apparatus for a power quality device comprises: a power quality analysis module, for sampling a power supply network to obtain a power quality information, and performing an analysis and computing on the sampling, so as to output an instruction information; N tracking control modules, for receiving respectively the instruction information and tracking the instruction information, so as to output N PWM control signals having a same frequency and constant phase shift therebetween, where N is a positive integer and N?2, thereby to control the power quality device; wherein the power quality analysis module and the N tracking control modules are operated based on a synchronized signal.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: April 7, 2015
    Assignee: Delta Electronics, Inc.
    Inventors: Heng Huang, Bin Wang, Hongyang Wu, Jingtao Tan
  • Patent number: 8717789
    Abstract: The configurations of a three-phase buck-boost power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a first single-phase buck-boost PFC circuit receiving a first phase voltage and having a first and a second output terminals and a neutral-point for outputting a first and a second output voltages, a second single-phase buck-boost PFC circuit receiving a second phase voltage and coupled to the first and the second output terminals and the neutral-point, a third single-phase buck-boost PFC circuit receiving a third phase voltage and coupled to the first and the second output terminals and the neutral-point, a first and a second output capacitors coupled to the first and the second output terminals respectively, and to the neutral-point also and a neutral line coupled to the neutral-point.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: May 6, 2014
    Assignee: Delta Electronics, Inc.
    Inventors: Jingtao Tan, Yang Li, Zhijian Zhou, Shichao Yan, Wen-Yin Tasi, Jianping Ying
  • Patent number: 8705254
    Abstract: The configurations of a single-phase dual buck-boost/buck power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a single-phase three-level buck-boost PFC circuit receiving an input voltage and having a first output terminal, a neutral-point and a second output terminal for outputting a first and a second output voltages, a single-phase three-level buck PFC circuit receiving the input voltage and coupled to the first output terminal, the neutral-point and the second output terminal, a first output capacitor coupled to the first output terminal and the neutral-point, a second output capacitor coupled to the neutral-point and the second output terminal, and a neutral line coupled to the neutral-point.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: April 22, 2014
    Assignee: Delta Electronics, Inc.
    Inventors: Jingtao Tan, Zhijian Zhou, Jianping Yang, Wenhui Gou, Jianping Ying
  • Patent number: 8670260
    Abstract: A multiple inverter and an active power filter system are disclosed in the invention, said multiple inverter can decrease the volume and harmonics, increase the efficiency and decrease the cost, and can be applied to various occasions. The technical scheme is: the filter assembly in the multiple inverter is installed at the output inductor of the multiple inverter for filtering the harmonics.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 11, 2014
    Assignee: Delta Electronics (Shanghai) Co., Ltd.
    Inventors: Bin Wang, Hongyang Wu, Jian Jiang, Jingtao Tan, Yaping Yang
  • Publication number: 20140002034
    Abstract: The present application discloses a power quality device and its control apparatus. The control apparatus comprises: a power quality analysis module, for sampling a power supply network to obtain a power quality information, and performing an analysis and computing on the sampling, so as to output an instruction information; N tracking control modules, for receiving respectively the instruction information and tracking the instruction information, so as to output N PWM control signals having a same frequency and constant phase shift therebetween, where N is a positive integer and N 2, thereby to control the power quality device; wherein the power quality analysis module and the N tracking control modules are operated based on a synchronized signal.
    Type: Application
    Filed: December 7, 2012
    Publication date: January 2, 2014
    Inventors: Heng Huang, Bin Wang, Hongyang Wu, Jingtao Tan
  • Publication number: 20130229836
    Abstract: A multiple inverter and an active power filter system are disclosed in the invention, said multiple inverter can decrease the volume and harmonics, increase the efficiency and decrease the cost, and can be applied to various occasions. The technical scheme is: the filter assembly in the multiple inverter is installed at the output inductor of the multiple inverter for filtering the harmonics.
    Type: Application
    Filed: September 14, 2012
    Publication date: September 5, 2013
    Applicant: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Bin Wang, Hongyang Wu, Jian Jiang, Jingtao Tan, Yaping Yang
  • Patent number: 8493761
    Abstract: The configurations of an inverter circuit are provided in the present invention. The proposed circuit includes a first bridge arm having a first sub-bridge arm with a first switch and a first middle point coupled to the first switch, and a second sub-bridge arm with a second switch and a second middle point coupled to the second switch, a first inductor having a first terminal coupled to the first middle point and a second terminal, and a second inductor having a first terminal coupled to the second middle point, and a second terminal coupled to the second terminal of the first inductor and outputting an AC voltage.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: July 23, 2013
    Assignee: Delta Electronics, Inc.
    Inventors: Jingtao Tan, Degang Yi, Fei Lv, Lei-Ming Lee, Jianping Ying, Wen-Yin Tsai
  • Patent number: 8305779
    Abstract: The configurations of a parallel-connected UPS circuit are provided in the present invention. The proposed circuit includes a neutral, a battery having a positive and a negative terminals, and a plurality of PFC boost converters, each of which includes a PFC circuit including an inductor having a first terminal coupled to the positive terminal and a second terminal, a rectifying bridge coupled to the second terminal of the inductor, and having a first terminal and a second terminal coupled to the negative terminal, a switch bridge having a first terminal coupled to the first terminal of the rectifying bridge and a second terminal coupled to the second terminal of the rectifying bridge, and a control switch having a first terminal and a second terminal coupled to the neutral.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: November 6, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Yansong Lu, Jingtao Tan, Xiao Chen, Hao Yu, Jianping Ying
  • Publication number: 20120182775
    Abstract: The configurations of a three-phase buck-boost power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a first single-phase buck-boost PFC circuit receiving a first phase voltage and having a first and a second output terminals and a neutral-point for outputting a first and a second output voltages, a second single-phase buck-boost PFC circuit receiving a second phase voltage and coupled to the first and the second output terminals and the neutral-point, a third single-phase buck-boost PFC circuit receiving a third phase voltage and coupled to the first and the second output terminals and the neutral-point, a first and a second output capacitors coupled to the first and the second output terminals respectively, and to the neutral-point also and a neutral line coupled to the neutral-point.
    Type: Application
    Filed: March 23, 2012
    Publication date: July 19, 2012
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Jingtao TAN, Yang LI, Zhijian ZHOU, Shichao YAN, Wen-Yin TASI, Jianping YING
  • Patent number: 8169804
    Abstract: The configurations of a three-phase buck-boost power factor correction (PFC) circuit are provided. The circuit includes a first single-phase buck-boost PFC circuit receiving a first phase voltage and having a first and a second output terminals and a neutral-point for outputting a first and a second output voltages, a second single-phase buck-boost PFC circuit receiving a third phase voltage and coupled to the first and the second output terminals and the neutral-point, a first to a fourth thyristors, each of which has an anode and a cathode. The anodes of the first and the third thyristors and the cathodes of the second and the fourth thyristors receive a second phase voltage, and the cathode of the first thyristor and the anode of the second thyristor are coupled to the first single-phase buck-boost PFC circuit.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: May 1, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Jingtao Tan, Yang Li, Zhijian Zhou, Shichao Yan, Wen-Yin Tasi, Jianping Ying
  • Publication number: 20100253295
    Abstract: The configurations of a single-phase dual buck-boost/buck power factor correction (PFC) circuit and a controlling method thereof are provided in the present invention. The proposed circuit includes a single-phase three-level buck-boost PFC circuit receiving an input voltage and having a first output terminal, a neutral-point and a second output terminal for outputting a first and a second output voltages, a single-phase three-level buck PFC circuit receiving the input voltage and coupled to the first output terminal, the neutral-point and the second output terminal, a first output capacitor coupled to the first output terminal and the neutral-point, a second output capacitor coupled to the neutral-point and the second output terminal, and a neutral line coupled to the neutral-point.
    Type: Application
    Filed: April 1, 2010
    Publication date: October 7, 2010
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Jingtao TAN, Zhijian ZHOU, Jianping YANG, Wenhui GOU, Jianping YING
  • Publication number: 20100149846
    Abstract: The configurations of an inverter circuit are provided in the present invention. The proposed circuit includes a first bridge arm having a first sub-bridge arm with a first switch and a first middle point coupled to the first switch, and a second sub-bridge arm with a second switch and a second middle point coupled to the second switch, a first inductor having a first terminal coupled to the first middle point and a second terminal, and a second inductor having a first terminal coupled to the second middle point, and a second terminal coupled to the second terminal of the first inductor and outputting an AC voltage.
    Type: Application
    Filed: December 11, 2009
    Publication date: June 17, 2010
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Jingtao Tan, Degang Yi, Fei Lv, Lei-Ming Lee, Jianping Ying, Wen-Yin Tsai
  • Publication number: 20100054002
    Abstract: The configurations of a parallel-connected UPS circuit are provided in the present invention. The proposed circuit includes a neutral, a battery having a positive and a negative terminals, and a plurality of PFC boost converters, each of which includes a PFC circuit including an inductor having a first terminal coupled to the positive terminal and a second terminal, a rectifying bridge coupled to the second terminal of the inductor, and having a first terminal and a second terminal coupled to the negative terminal, a switch bridge having a first terminal coupled to the first terminal of the rectifying bridge and a second terminal coupled to the second terminal of the rectifying bridge, and a control switch having a first terminal and a second terminal coupled to the neutral.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 4, 2010
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Yansong LU, Jingtao TAN, Xiao CHEN, Hao YU, Jianping YING
  • Patent number: 7619323
    Abstract: Provided is an uninterruptible power supply for providing a sinusoidal-wave output AC voltage. The uninterruptible power supply is advantageous in terms of a DC/DC converter unit consisted of a plurality of DC/DC converter, in which the input terminals of the DC/DC converters are connected in parallel with each other and the output terminals of the DC/DC converters are connected in series with each other. The output DC voltages of the DC/DC converters are configured to sum up to form a full-wave rectified DC voltage, which can be converted into a sinusoidal-wave output AC voltage by an inverter. Furthermore, the uninterruptible power supply provides an energy recycle converter configured for recycling the redundant energy of the uninterruptible power supply to charge a battery pack.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: November 17, 2009
    Assignee: Delta Electronics, Inc.
    Inventors: Jingtao Tan, Changzan Ma, Weimin Wu, Zhiqiang Jiang, Jianping Ying
  • Patent number: D866268
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: November 12, 2019
    Inventor: Jingtao Tan
  • Patent number: D880956
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 14, 2020
    Inventor: Jingtao Tan
  • Patent number: D893257
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: August 18, 2020
    Inventor: Jingtao Tan
  • Patent number: D942815
    Type: Grant
    Filed: December 7, 2019
    Date of Patent: February 8, 2022
    Inventor: Jingtao Tan