Abstract: A blue top emitting quantum dot light-emitting device and a display apparatus are disclosed. The blue top emitting quantum dot light-emitting device includes: a cathode and an anode oppositely arranged, a blue quantum dot light-emitting layer between the cathode and the anode, an electron transport layer between the cathode and the blue quantum dot light-emitting layer, and a hole transport layer between the blue quantum dot light-emitting layer and the anode; where: a material of the blue quantum dot light-emitting layer is ZnSe1-x:Tex/ZnSe/ZnS, ZnSe1-x:Tex means that a molar ratio of Se to Te is 1-x:x, and x is 0.03 to 0.07; a thickness of the hole transport layer is 10 nm to 35 nm, a thickness of the electron transport layer is 25 nm to 50 nm, and a sum of thicknesses of the hole transport layer and the electron transport layer is 55 nm to 65 nm.

Abstract: Provided is a display panel including: a substrate, including a display region and a GOA region at least partially surrounding the display region; a plurality of pixels arranged in arrays, disposed in the display region; a first GOA circuit, disposed in the GOA region, wherein the first GOA circuit includes a plurality of cascaded first GOA units, each of the first GOA units being coupled to at least one row of the pixels and being configured to transmit a gate drive signal to the at least one row of the pixels; and a second GOA circuit, disposed in the GOA region, wherein the second GOA circuit includes a plurality of cascaded second GOA units, each of the second GOA units being coupled to at least one row of the pixels and being configured to transmit a light emission control signal to the at least one row of the pixels.

Abstract: The present application relates to a shift register, a scanning driving circuit and a displaying device. The shift register includes a first inputting circuit, a first outputting circuit, a second inputting circuit, a second outputting circuit and a second controlling circuit. The second controlling circuit is electrically connected to a first node, a second node, a fifth voltage terminal, a second clock-signal terminal and a controlling terminal. The second controlling circuit is configured for, under the control of the signal of the second node, the control of a second clock signal and the control of the signal of the controlling terminal, when the first outputting circuit is switched on, disconnecting the electric connection between the first node and the fifth voltage terminal, and when the second outputting circuit is switched on, writing the signal of the fifth voltage terminal into the first node.

Abstract: In a pixel circuit, a first reset transistor is coupled between a gate of a drive transistor and an initialization signal terminal, and a gate of the first reset transistor is coupled to a reset control terminal; a compensation transistor is coupled between the gate and a first electrode of the drive transistor, and a gate of the compensation transistor is coupled to a first scan control terminal; a data writing transistor is coupled between a second electrode of the drive transistor and a data signal terminal, and a gate of the data writing transistor is coupled to a second scan control terminal; a first light emitting control transistor is coupled between the second electrode of the drive transistor and a first power supply terminal, and a gate of the first light emitting control transistor is coupled to a light emitting control terminal.

Abstract: An array substrate is provided. The array substrate includes a plurality of data lines; a plurality of second fanout connecting lines; and a plurality of first voltage supply lines. In at least one subpixel of the array substrate, an individual data line of the plurality of data lines and an individual second fanout connecting line of the plurality of second fanout connecting lines have a substantial mirror symmetry with respect to an individual first voltage supply fine of the plurality of first voltage supply lines.

Abstract: A pixel circuit includes a driving sub-circuit coupled to a first node, a second node and a third node, a compensation sub-circuit coupled to the first node, the third node and a first scan signal terminal, an adjustment sub-circuit, and a writing sub-circuit. The compensation sub-circuit includes a first transistor group, and the first transistor group includes at least two first transistors connected in series. A fourth node is formed between a second electrode of a first first transistor and a first electrode of a second first transistor. The adjustment sub-circuit is coupled to the fourth node and at least one control terminal. The adjustment sub-circuit is configured to, in light-emitting phases, adjust a voltage of the fourth node under a control of a signal from the at least one control terminal, so as to reduce a voltage difference between the fourth node and the first node.

Abstract: A pixel driving circuit is provided. The pixel driving circuit includes a driving transistor; a storage capacitor having a first capacitor electrode and a second capacitor electrode; a coupling capacitor having a third capacitor electrode and a fourth capacitor electrode; a control transistor; and a data write transistor having a gate electrode connected to a gate line, a first electrode connected to a data line, and a second electrode connected to a first electrode of the control transistor; wherein the control transistor has a gate electrode connected to a fourth control signal line, a first electrode connected to the second electrode of the data write transistor, and a second electrode connected to the first capacitor electrode and the fourth capacitor electrode; a gate electrode of the driving transistor is connected to the third capacitor electrode; and the control transistor is an n-type transistor.

Abstract: A display device, a gamma voltage data group switching method and module. The display device includes a display-driver integrated circuit and a first storage unit. The display-driver integrated circuit includes a second storage unit, and the display device includes a gamma voltage data group switching module. The gamma voltage data group switching module is configured to pre-store, in the first storage unit, multiple groups of gamma voltage data groups respectively applied to various application scenarios; when switching of an application scenario of the display device, load a gamma voltage data group corresponding to the current application scenario and stored in the first storage unit into the second storage unit.

Abstract: This disclosure provides a shift register, drive circuit, drive method, display panel, and display apparatus. The shift register includes an input unit, a first control unit, an output unit and an isolation unit, wherein the input unit provides a starting signal of a signal input terminal to a first node, and provides a first signal of a first signal terminal to a second node, so that under control of the second node and a second clock signal terminal, the first control unit provides a second clock signal of the second clock signal terminal to a third node; under control of the third node, the isolation unit provides a voltage signal of the first node to a fourth node; and under control of the fourth node and the third node, the output unit outputs based on the first signal or a second signal of the second signal terminal.

Abstract: The pixel circuit includes: a light emitting module configured to emit light; a driving module configured to drive the light emitting module to emit light according to a driving voltage during a light emitting stage; a storage module configured to maintain the driving voltage and to provide the driving voltage to the driving module during the light emitting stage; a first transistor, a first electrode of the first transistor being connected to a position where the driving module receives the driving voltage, and a second electrode of the first transistor being not directly connected to a signal source; a second transistor, a first electrode of the second transistor being connected to the first electrode of the first transistor, wherein a structure to which a second electrode of the second transistor is connected is different from a structure to which the second electrode of the first transistor is connected.

Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes: a base substrate including a first and second display regions; a light transmittance of the first display region is greater than that of the second display region; first sub-pixels in the first display region. At least one first sub-pixel includes a first pixel circuit and a first light emitting device; the first pixel circuit includes a storage capacitor and a driving transistor; and a data writing sub-circuit configured to write a data voltage signal to a gate electrode of the driving transistor in response to a first and second scan signals; a reset sub-circuit configured to provide an initialization voltage signal to a first electrode of the first light emitting device in response to the second scan signal; and a luminescent control sub-circuit configured to transmit a driving current to the first light emitting device.

Abstract: A display panel and a display apparatus. The display panel includes a blue light-emitting device, and the blue light-emitting device includes a first electrode, an electron blocking layer, a light-emitting layer and a second electrode which are stacked. The hole mobility of the electron blocking layer is not greater than 5×10?4 cm2/VS, so that electrons and holes in the light-emitting layer tend to be balanced, and luminous efficiency of the blue light-emitting device under the low luminance is improved.

Abstract: A display panel and a display device, relate to the technical field of display technology. The present disclosure disposes a plurality of subpixel on a substrate, each subpixel comprises a compensating transistor, a drive transistor, a storage capacitance and a first initialization signal line, a first active pattern of the compensating transistor includes a first active section, a second active section and a third active section, the second active section extends along a first direction, and extension directions of the first active section and the third active section intersect with the first direction; the first initialization signal line extends along the first direction, and an overlapping area exists between an orthogonal projection of the first initialization signal line on the substrate and an orthogonal projection of the second active section on the substrate, the first initialization signal line overlaps with the first active pattern directly to form a coupling capacitance.

Abstract: An array substrate is provided. The array substrate includes a plurality of first subpixels in a first region and a plurality of second subpixels in a second region. The plurality of first subpixels include a plurality of first pixel driving circuits. The plurality of second subpixels include a plurality of second pixel driving circuits. A respective first pixel driving circuit of the plurality of first pixel driving circuits includes a smaller number of transistors than a respective second pixel driving circuit of the plurality of second pixel driving circuits. The first region has a light transmittance higher than the second region, and a subpixel density same as the second region.

Abstract: The present disclosure provides a transducer unit and a manufacturing method thereof, and a transducer, the transducer unit includes: a base substrate; a first electrode on the base substrate; a support pattern on a side of the first electrode away from the base substrate, which is enclosed into an first groove, at least one second groove and at least one third groove, an orthographic projection of the second groove on the base substrate is spaced apart from that of the first groove on the base substrate, the third groove is between the first groove and the second groove to communicate them; a diaphragm pattern on the side of the first electrode away from the base substrate and capable of vibrating in the first groove; a filling pattern in the second groove; a second electrode on a side of the diaphragm pattern away from the base substrate.

Abstract: Provided is a pixel circuit. In the pixel circuit, a data write circuit may transmit a data signal to a first node; a compensation circuit may adjust a potential of a second node and a potential of a third node based on a gate drive signal; a first reset circuit may transmit a first initial power supply signal to the third node; a drive circuit may transmit a drive signal to the second node based on the potential of the third node and a potential of the first node; and a second reset circuit may transmit a second initial power supply signal to a first electrode of a light-emitting element.

Abstract: A display panel and a display device are provided, which belong to the field of display technologies. The display panel includes: a substrate including a display region and a gate driver on array (GOA) region, a plurality of rows and a plurality of columns of pixels disposed in the display region, and a first GOA circuit disposed in the GOA region. The first GOA circuit includes a plurality of cascaded first shift register units, and the plurality of first shift register units are coupled to the plurality of rows of pixels by a plurality of gate lines, and are configured to transmit gate drive signals to the plurality of rows of pixels through the plurality of gate lines, to drive the plurality of rows of pixels to emit light.

Abstract: A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels arranged on the base substrate. A plurality of sub-pixel driving circuitries in the plurality of sub-pixels is arranged in columns, the columns of sub-pixel driving circuitries are divided into a plurality of column units, and each column unit includes at least two adjacent columns of sub-pixel driving circuitries. The display substrate further includes a first initialization signal transmission layer including a first initialization bus and a plurality of first initialization branches. The first initialization branch includes a first branch body member and a plurality of first branch extending members. The first branch body member is coupled to the sub-pixel driving circuitries in a corresponding column unit through the plurality of first branch extending members.

Abstract: A display panel and a display device are provided. The display panel includes sub pixel units arranged in an array along a first direction (X) and a second direction (Y) intersecting with the first direction (X). The display panel further includes a base substrate (81), a second conductive layer, a fourth conductive layer, and a common electrode layer (6). The second conductive layer includes multiple first conductive parts (21). The first conductive part (21) is arranged in correspondence with the pixel driving circuit. The first conductive part (21) is used to form the first electrode of the capacitor (C) in the pixel driving circuit corresponding thereto. The fourth conductive layer includes multiple first power lines (VSS). Orthographic projections of the first power lines (VSS) on the base substrate (81) are distributed in a spaced manner along the first direction (X) and extend along the second direction (Y).

Abstract: In some embodiments, a lubricating oil includes at least 50 wt % of a base oil, based on total weight of the lubricating oil. The lubricating oil includes at least 0.1 wt % of a polypropylene homopolymer having a racemic dyad content of about 60% to about 99% and a number average molecular weight (by GPC DRI) of about 10,000 g/mol to about 250.000 g/mol, wherein a total amount of the base oil and the polypropylene homopolymer does not exceed 100 wt %.