Abstract: An autonomous mobile device (AMD) moves around a physical space while performing tasks. The AMD may have sensors with fields of view (FOVs) that are forward-facing. As the AMD moves forward, a safe region is determined based on data from those forward-facing sensors. The safe region describes a geographical area clear of obstacles during recent travel. Before moving outside of the current FOV, the AMD determines whether a move outside of the current FOV keeps the AMD within the safe region. For example, if a path that is outside the current FOV would result in the AMD moving outside the safe region, the AMD modifies the path until poses associated with the path result in the AMD staying within the safe region. The resulting safe path may then be used by the AMD to safely move outside the current FOV.

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a third nitride-based semiconductor layer, a passivation layer, a gate insulator layer, and a gate electrode. The first nitride-based semiconductor layer includes at least two doped barrier regions defining an aperture between the doped barrier regions. The second nitride-based semiconductor layer is disposed over first nitride-based semiconductor layer. The third nitride-based semiconductor layer is disposed on the second nitride-based semiconductor layer and has a bandgap higher than a bandgap of the second nitride-based semiconductor layer. The passivation layer is disposed over the third nitride-based semiconductor layer, in which a vertical projection of the passivation layer on the first nitride-based semiconductor layer is spaced apart from the aperture. The gate insulator layer is disposed over the third nitride-based semiconductor layer.

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a nitride-based multiple semiconductor layer, a gate electrode, a gate insulator layer, and a source electrode. The first nitride-based semiconductor layer includes a drift region and at least two doped barrier regions defining an aperture in the drift region. The nitride-based multiple semiconductor layer structure is disposed over the first nitride-based semiconductor layer and has a first heterojunction and a second heterojunction which are separated from each other. The gate electrode is received by the nitride-based multiple semiconductor layer structure and vertically aligns with the aperture in the drift region. The gate insulator layer is disposed between the nitride-based multiple semiconductor layer structure and the gate electrode.

Abstract: A flip-chip semiconductor package with improved heat dissipation capability and low package profile is provided. The package comprises a heat sink having a plurality of heat dissipation fins and a plurality of heat dissipation leads. The heat dissipation leads are connected to a plurality of thermally conductive vias of a substrate so as to provide thermal conductivity path from the heatsink to the substrate as well as support the heatsink to relieve compressive stress applied to a semiconductor die by the heatsink. The package further comprises an encapsulation layer configured to cover the heat dissipation leads of the heat sink and expose the heat dissipation fins of the heat sink.

Abstract: A vacuum degree detection device with buried electrodes in a vacuum interrupter and a method thereof are provided. The vacuum degree wireless detection device includes two parts, wherein a first part is provided inside the vacuum interrupter, including buried electrodes, etc., wherein the buried electrodes are welded on an end cover of the vacuum interrupter; a second part is the external detection device after the arc interrupter is processed, including: detection and calculation components, wireless transmitters, rechargeable energy storage batteries, wireless charging coils, etc. The external detection device and the buried electrode structure is designed separately, and the buried structure such as the buried electrodes can be processed as a whole with the vacuum interrupter. During the detection, the external detection device is installed above the buried electrode structure.

Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a gate electrode, a first electrode, a first via and a second via. The substrate has a first surface and a second surface. The first nitride semiconductor layer is disposed on the first surface of the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap exceeding that of the first nitride semiconductor layer. The gate electrode and the first electrode are disposed on the second nitride semiconductor layer. The first via extends from the second surface and is electrically connected to the first electrode. The second via extends from the second surface. The depth of the first via is different from the depth of the second via.

Abstract: A pulse voltage conditioning method of a vacuum interrupter with automatic conditioning energy adjustment based on a trend of a breakdown voltage of the vacuum interrupter during a conditioning process. A current-limiting resistor and a parallel capacitor are automatically adjusted to ensure the conditioning energy reaching a critical value without deconditioning effect. The critical value refers to a maximum conditioning energy without damaging the electrode surfaces, namely an optimal conditioning energy, which can better remove insulation defects on the electrode surface and improve insulation performance of a vacuum gap. The problems of insufficient conditioning and deconditioning effect during conventional voltage conditioning process of the vacuum interrupter can be solved. Therefore, insulation strength of the vacuum interrupter can be raised to a higher level through conditioning.

Abstract: A flip-chip semiconductor package with improved heat dissipation capability and low package profile is provided. The package comprises a heat sink having a plurality of heat dissipation fins and a plurality of heat dissipation leads. The heat dissipation leads are connected to a plurality of thermally conductive vias of a substrate so as to provide thermal conductivity path from the heatsink to the substrate as well as support the heatsink to relieve compressive stress applied to a semiconductor die by the heatsink. The package further comprises an encapsulation layer configured to cover the heat dissipation leads of the heat sink and expose the heat dissipation fins of the heat sink.