Abstract: The present disclosure is intended to solve non-uniform distribution of a polymer binder in an electrode active material layer and to improve the adhesion between an electrode current collector and an electrode active material layer. The present disclosure provides a method for manufacturing an electrode which includes the steps of: (S1) applying electrode slurry containing an electrode active material, a polymer binder and a conductive material dispersed in a solvent to one surface of an electrode current collector; (S2) stacking a polymer film onto the top surface coated with the electrode slurry; (S3) drying the electrode current collector having the polymer film stacked thereon to allow evaporation of the solvent; and (S4) rolling the electrode current collector having the polymer film stacked thereon to obtain an electrode.

Abstract: The present disclosure is intended to solve non-uniform distribution of a polymer binder in an electrode active material layer and to improve the adhesion between an electrode current collector and an electrode active material layer. The present disclosure provides a method for manufacturing an electrode which includes the steps of: (S1) applying electrode slurry containing an electrode active material, a polymer binder and a conductive material dispersed in a solvent to one surface of an electrode current collector; (S2) stacking a polymer film onto the top surface coated with the electrode slurry; (S3) drying the electrode current collector having the polymer film stacked thereon to allow evaporation of the solvent; and (S4) rolling the electrode current collector having the polymer film stacked thereon to obtain an electrode.

Abstract: A plasma display supplies a high level voltage and a low level voltage to first and second electrodes performing a sustain discharge in opposite phases during a sustain period. After a voltage of the first electrodes is decreased through a first inductor connected to the first electrodes, the first electrodes are floated to maintain the voltage of the first electrodes at a second voltage. Then, while the voltage of the first electrodes is changed from the second voltage to a low level voltage, the magnitude of the current flowing through a second inductor connected to the second electrodes is increased. Then, the voltage of the second electrodes is increased to a high level voltage using the second inductor. After energy is accumulated in the second inductor, the voltage of the second electrode is increased to the high level voltage.

Abstract: In a plasma display, a first transistor is coupled between a low voltage terminal of a scan circuit and a power source configured to supply a scan voltage, and a second transistor is coupled between the low voltage terminal and the first transistor. A third transistor is coupled to the low voltage terminal, and a capacitor is coupled between the third transistor and a node between the first and second transistors. In addition, a fourth transistor is coupled between the low voltage terminal and a ground terminal. By utilizing the capacitor, power consumption of a transistor can be reduced, and accordingly, heat dissipation of the transistor also can be reduced.

Abstract: A plasma display and a driving apparatus thereof with an improved energy recovery circuit configured to reduce resonances between a plurality of capacitors. Accordingly to an embodiment of the present invention, a plasma display has an energy recovery circuit that includes an energy recovery capacitor. The energy recovery circuit is configured to form a first path between the energy recovery capacitor and a display electrode to change a voltage at the display electrode in a sustain period. The energy recovery capacitor includes a plurality of capacitors configured to be charged concurrently, and the energy recovery circuit is configured to form a second path between the plurality of capacitors. A product of an inductance formed on the second path and a capacitance formed on the second path is greater than twice a product of an inductance formed on the first path and a capacitance formed on the first path.

Abstract: A method for fabricating a capacitor includes forming a first storage node (SN) oxide layer over a substrate, forming a second SN oxide layer over the first SN oxide layer, forming a mask pattern over the second SN oxide layer, dry-etching the first and the second SN oxide layers using the mask pattern as an etch barrier to form a capacitor region, and wet-etching a resultant structure including the capacitor region to enlarge a bottom width of the capacitor region, thereby forming a final capacitor region having the enlarged bottom width, wherein the first SN oxide layer comprises one portion of high impurity concentration and the other portion of low impurity concentration, the one portion corresponding to a region where the final capacitor region is to be formed.

Abstract: A plasma display and a driving method thereof. The plasma display includes a plurality of first electrodes, a first switch, a second switch, a third switch, and a first capacitor. The first switch is connected between a first power source to supply a first voltage and the plurality of first electrodes. The second switch includes a first terminal electrically connected to the plurality of first electrodes, a second terminal connected to a second power source to supply a second voltage that is lower than the first voltage, and a gate connected to a signal input terminal. The third switch includes a first terminal electrically connected to the plurality of first electrodes, and a gate electrically connected to the first signal input terminal. The first capacitor includes a terminal connected to the second power source, and another terminal connected to a node of the first power source and a second terminal of the third switch.

Abstract: The present invention relates to a plasma display device and a driving method thereof. The plasma display device includes a first switch, and a second switch. The first switch has a first end electrically connected to a first power source that supplies a first voltage and a second end electrically connected to the plurality of first electrodes, and gradually increases a voltage of the plurality of first electrodes during a reset period. The second switch has a first end electrically connected to a second power source that supplies a second voltage that is less than the first voltage and a second end electrically connected to the plurality of first electrodes. The first and second switches are simultaneously turned on in the reset period.

Abstract: A method for fabricating a semiconductor device using a dual damascene process is provided. The method includes forming a dielectric layer over a conductive layer, forming a via hole exposing the conducting layer by selectively etching the dielectric layer, projecting a portion of the dielectric layer at an edge of the via hole by selectively etching the dielectric layer to a first depth, and forming a trench by selectively etching the dielectric layer to a second depth, wherein the trench is overlapped with the via hole to form a dual damascene pattern.

Abstract: A method for fabricating a semiconductor device using a dual damascene process is provided. The method includes forming a dielectric layer over a conductive layer, forming a via hole exposing the conducting layer by selectively etching the dielectric layer, projecting a portion of the dielectric layer at an edge of the via hole by selectively etching the dielectric layer to a first depth, and forming a trench by selectively etching the dielectric layer to a second depth, wherein the trench is overlapped with the via hole to form a dual damascene pattern.

Abstract: A plasma display device includes: a sustain drive unit that applies a sustain pulse having a first voltage and a second voltage lower than the first voltage to a plurality of first electrodes; a scan drive unit including a plurality of selection circuits coupled to the first electrodes and each including first and second switches; and a clamping unit including a clamping diode coupled to at least one of the selection circuits and clamps the voltage of the first electrode at the first voltage when it exceeds the first voltage. The plasma display device can prevent overshoot that can occur when the first voltage of the sustain pulse is applied to the first electrode in a sustain period so as to apply a stable discharge pulse. The magnitude of the overshoot may depend on the distance between the scan driving board and each of the plurality of selection circuits IC.

Abstract: In a plasma display device, a capacitor is coupled between the high voltage terminal and the low voltage terminal of a scan circuit. During a first period of a falling period of a reset period, voltage of a scan electrode is gradually decreased to a first voltage through the low voltage terminal and the capacitor. Next, during a second period of the falling period, the voltage of the scan electrode is gradually decreased from the first voltage to a second voltage through the low voltage terminal without through the capacitor.

Abstract: A method for fabricating a capacitor includes forming a first storage node (SN) oxide layer over a substrate, forming a second SN oxide layer over the first SN oxide layer, forming a mask pattern over the second SN oxide layer, dry-etching the first and the second SN oxide layers using the mask pattern as an etch barrier to form a capacitor region, and wet-etching a resultant structure including the capacitor region to enlarge a bottom width of the capacitor region, thereby forming a final capacitor region having the enlarged bottom width, wherein the first SN oxide layer comprises one portion of high impurity concentration and the other portion of low impurity concentration, the one portion corresponding to a region where the final capacitor region is to be formed.

Abstract: An initialization and driving method for a plasma display panel. When the plasma display panel is turned on, a voltage at a first electrode is increased from a first voltage to a second voltage, and a voltage at a second electrode is reduced from a fourth voltage to the fifth voltage for the purpose of forming wall charges in cells while a third voltage is applied to the second electrode. A voltage is applied to the first electrode and the second electrode to establish a difference between the first electrode and the second electrode to be alternately a sixth voltage and a negative voltage of the sixth voltage, and therefore the cell is discharged.

Abstract: A plasma display includes a plurality of scan electrodes. A scan voltage is sequentially supplied to the plurality of scan electrodes, and a non-scan voltage that is higher than the scan voltage is supplied to scan electrodes to which the scan voltage is supplied. The non-scan voltage is generated by dividing a voltage that is higher than the non-scan voltage and the scan voltage. Thus, a voltage source for supplying the non-scan voltage can be eliminated.

Abstract: In a plasma display, image data are mapped on N subfields, and the subfield with the greatest weight is determined from among the mapped subfields. When the subfield with the greatest weight is the Kth subfield (K>M), grayscales of the image data are expressed with the mapped data of the (K?M+1)th subfield to the Kth subfield, and the mapped data from the first subfield to the (K?M)th subfield may be ignored.

Abstract: A plasma display with an improved energy recovery circuit. The plasma display includes a display electrode coupled to an energy recovery circuit. The energy recovery circuit includes an energy recovery capacitor and a circuit unit that is configured to form a first path between the energy recovery capacitor and the display electrode to change a voltage at the display electrode in a sustain period. The energy recovery capacitor includes a plurality of capacitors configured to be charged concurrently, and the circuit unit is configured to selectively substantially prevent a current from flowing between two capacitors of the plurality of capacitors via a second path.

Abstract: A plasma display including a first electrode and a second electrode formed in parallel is disclosed. The plasma display gradually decreases a voltage at the second electrode from a second voltage to a third voltage while a first voltage is applied to the first electrode during a reset period. The plasma display changes the first voltage according to a change in the discharge firing voltage between the first electrode and the second electrode. The change in the discharge firing voltage may be determined in accordance with an accumulated driving time or a discharge time during the reset period.

Abstract: A method for fabricating a semiconductor device using a dual damascene process is provided. The method includes forming a dielectric layer over a conductive layer, forming a via hole exposing the conducting layer by selectively etching the dielectric layer, projecting a portion of the dielectric layer at an edge of the via hole by selectively etching the dielectric layer to a first depth, and forming a trench by selectively etching the dielectric layer to a second depth, wherein the trench is overlapped with the via hole to form a dual damascene pattern.

Abstract: A plasma display panel driver. The driver uses a high side switch of a scan IC to increase a voltage width of an initialization waveform which is applied in the initial operation of the plasma display panel set. Accordingly, the initial screen is stably driven, and a voltage width is increased without additional installation of elements or an increase of a withstanding voltage switches.