Patents by Inventor Jinhui Wang

Jinhui Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260216207
    Abstract: The present invention discloses a 7-carbonylstaurosporine derivative, a preparation method therefor, and use thereof. The present invention further discloses a chemical synthesis method for 18 typical compounds of this type, which has a simple synthetic route, is easy to operate and implement, and has easily purchasable required reagents. The compounds disclosed in the present invention have significant inhibitory activity against a PIM-1 kinase and excellent kinase selectivity, and can be used for development of therapeutic drugs for related diseases or disorders caused by abnormal expression of the PIM-1 kinase.
    Type: Application
    Filed: January 3, 2024
    Publication date: July 30, 2026
    Inventors: ZHONGJUN MA, JINHUI WANG, WANJING DING, YIJUN MA, MEIXING LIU
  • Patent number: 12621073
    Abstract: A method and an apparatus are provided for determining a network device receiving a first signal and at least one second signal, wherein the first signal carries data to be sent through a first flexible Ethernet interface. A first physical layer clock is determined based on the first signal. A second physical layer clock is determined based on the at least one second signal or the first physical layer clock and the at least one second signal. The first physical layer clock or the second physical layer clock is used as a sending clock of a non-flexible Ethernet interface. The network device includes the first flexible Ethernet interface and the non-flexible Ethernet interface.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: May 5, 2026
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jingfei Lyu, Fanshun Meng, Jinhui Wang, Wei Su
  • Publication number: 20260037809
    Abstract: A machine learning network is accessed. The network includes one or more processing layers. At least one of the processing layers is sourced with flexible bit truncation storage hardware. A flexible bit truncation setting is determined for the at least one of processing layers. The determining is based on an application to be executed on the network. At least one additional flexible bit truncation setting is determined, enabling at least two processing layers to be sourced with flexible bit truncation storage hardware. At least one of the additional flexible bit truncation settings is different from the flexible bit truncation setting. The flexible bit truncation setting is programmed in the flexible bit truncation storage hardware of the processing layers. The application is executed using the flexible bit truncation setting. The flexible bit truncation storage hardware comprises a static RAM (SRAM).
    Type: Application
    Filed: August 20, 2025
    Publication date: February 5, 2026
    Applicant: University of South Alabama
    Inventors: Na Gong, William Donald Oswald, Jinhui Wang, Mohamed Elsaid Shaban, Md. Bipul Hossain
  • Publication number: 20260038586
    Abstract: A plurality of random access memory (RAM) cells is accessed. The RAM cells are arranged in an array and include bitlines and wordlines. The bitlines and wordlines are functionally accessible for data storage and retrieval. The accessibility is based on logic circuitry coupled to the array and to power inputs, address inputs, control inputs, and data inputs and outputs. A truncation manager is coupled to the array for controlling the bitlines. The truncation manager selectively controls bitline power and bitline data output. Bitline power header devices are coupled to the array. The bitline power header devices selectively distribute power along each of the bitlines. Bitline output multiplexors are coupled to the array. The bitline output multiplexors selectively couple the bitlines to the data outputs. The truncation manager controls a plurality of truncation logic units.
    Type: Application
    Filed: August 1, 2025
    Publication date: February 5, 2026
    Applicant: University of South Alabama
    Inventors: Na Gong, William Donald Oswald, Jinhui Wang
  • Patent number: 12531716
    Abstract: A method, a device, and a system, the method including determining, by a management device, a first transmission path that is in a network system and that is used to transmit a clock packet of a target clock source, sending, by the management device, configuration information for the first transmission path to a plurality of network devices on the first transmission path, receiving, by the management device, information that is sent by an endpoint network device on the first transmission path and that is used to determine a time difference, and sending, by the management device, a corresponding clock compensation value to at least one network device on the first transmission path based on the information that is used to determine the time difference.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: January 20, 2026
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Tongfu Hu, Tao He, Jingfei Lv, Hao Li, Jinhui Wang
  • Patent number: 12160308
    Abstract: A fiber link detection method is implemented by a first network device of an optical communications network. The fiber link detection method includes obtaining a forward delay value indicating a forward delay of transmitting a first Precision Time Protocol (PTP) packet by a second interface of a second network device to a first interface of the first network device over a fiber link. A reverse delay value indicating a reverse delay of transmitting a second PTP packet by the first interface to the second interface over the fiber link is obtained, and a determination is made, based on the forward delay value, the reverse delay value, and a first threshold, that the fiber link comprises a third network device, where the first network device and the second network device support a PTP, and where the third network device does not support the PTP.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: December 3, 2024
    Assignee: HUAWEI TECHNOLOIGES CO., LTD.
    Inventors: Jinhui Wang, Cong Chen, Jingfei Lv
  • Patent number: 12149603
    Abstract: A clock port attribute recovery method includes a network device setting a value of a port attribute of a clock port of the network device to a first value based on the clock port not receiving any one of three types of clock messages: N synchronization messages, follow-up messages, and delay response messages within a timeout interval, where the first value indicates that a message is lost on the clock port. Based on a case that a recovery condition is met, the network device sets the value of the port attribute of the clock port to a second value, where the second value indicates that a status of the clock port is that the message is not lost.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: November 19, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jingfei Lv, Yawei Zhang, Jinhui Wang, Hao Li
  • Publication number: 20240204896
    Abstract: A method for monitoring time synchronization, an apparatus, and a system. The method includes: a first network device obtains synchronization path information, where the synchronization path information is information about a synchronization path between a first time synchronization device and a time source. The first network device obtains time offset information of a plurality of time synchronization devices, where the time offset information of each of the plurality of time synchronization devices is information about a time offset between the time synchronization device and an upstream time device, and the plurality of time synchronization devices are time synchronization devices on the synchronization path. The first network device calculates a time offset of the synchronization path based on the synchronization path information and the time offset information of the plurality of time synchronization devices.
    Type: Application
    Filed: March 1, 2024
    Publication date: June 20, 2024
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaoyi ZENG, Jingfei LYU, Jinhui WANG
  • Publication number: 20240143332
    Abstract: This application provides an exception locating method includes: A first device receives a first exception signal which changes abruptly from a first communication signal when the first communication signal passes through a location of an exception on a first line. The first device receives exception alarm information which is sent by the second device after the second device receives a second exception signal, the second exception signal is a signal that changes abruptly from a second communication signal when the second communication signal passes through the location of the exception. The first device determines the location of the exception based on a first time interval, where the first time interval is an interval between time at which the first exception signal is received and time at which the exception alarm information is received.
    Type: Application
    Filed: December 19, 2023
    Publication date: May 2, 2024
    Inventors: Wei WU, Jianfeng WANG, Jinhui WANG, Hao LI
  • Patent number: 11960318
    Abstract: A clock oscillator, a clock oscillator production method and use method, and a chip including the clock oscillator are provided. The clock oscillator includes a resonator, a shock-absorbing material layer, and a base, and at least a part of the shock-absorbing material layer is located between the resonator and the base. In the clock oscillator, the shock-absorbing material layer is added between the resonator and the base, and the shock-absorbing material layer can effectively prevent a mechanical wave from being conducted between the base and the resonator, so that the resonator is protected from external vibration. This can ensure, when there is external vibration, that an output frequency of the resonator is not deteriorated and improve shock absorption performance of the clock oscillator.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wei Wu, Jinhui Wang, Hao Li, Yong Yang, Xinhua Huang
  • Publication number: 20240097641
    Abstract: A resonator includes a resonance layer, a substrate, and a barrier layer. The barrier layer is located on the substrate, and the barrier layer and the substrate form a cavity. The cavity is configured to accommodate the resonance layer. The barrier layer includes a top wall and a side wall, and an inner surface of the side wall surrounds the resonance layer. An outer surface of the side wall includes a groove, and the groove surrounds the side wall.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Inventors: Wei Wu, Hao Li, Jinhui Wang, Wei Li
  • Publication number: 20240056209
    Abstract: A method and an apparatus determines a network device receiving a first signal and at least one second signal, wherein the first signal carries data to be sent through a first flexible Ethernet interface. A first physical layer clock is determined based on the first signal. A second physical layer clock is determined based on the at least one second signal or the first physical layer clock and the at least one second signal. The first physical layer clock or the second physical layer clock is used as a sending clock of a non-flexible Ethernet interface. The network device includes the first flexible Ethernet interface and the non-flexible Ethernet interface.
    Type: Application
    Filed: October 23, 2023
    Publication date: February 15, 2024
    Inventors: Jingfei Lyu, Fanshun Meng, Jinhui Wang, Wei Su
  • Publication number: 20240007470
    Abstract: A method, system and computer program product for secure access management for tools within a secure environment. A virtual file system for a user in memory on a server side in the secure environment is accessed as part of an authenticated user session including a user command instigated by a user. At the virtual file system, an encrypted file stored in the secure environment is obtained, where the file is encrypted using a public key of a user. A read operation at the virtual file system of the encrypted file is intercepted and the encrypted file is sent to a client at a user system external to the secure environment over a secure connection for decryption by a remote cryptography device of the user system using the user's private key. The decrypted file is then received at the virtual file system enabling the user to run the required user command.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Olgierd Pieczul, Jinhui Wang
  • Patent number: 11799861
    Abstract: A method, system and computer program product for secure access management for tools within a secure environment. A virtual file system for a user in memory on a server side in the secure environment is accessed as part of an authenticated user session including a user command instigated by a user. At the virtual file system, an encrypted file stored in the secure environment is obtained, where the file is encrypted using a public key of a user. A read operation at the virtual file system of the encrypted file is intercepted and the encrypted file is sent to a client at a user system external to the secure environment over a secure connection for decryption by a remote cryptography device of the user system using the user's private key. The decrypted file is then received at the virtual file system enabling the user to run the required user command.
    Type: Grant
    Filed: December 19, 2020
    Date of Patent: October 24, 2023
    Assignee: International Business Machines Corporation
    Inventors: Olgierd Pieczul, Jinhui Wang
  • Patent number: 11750310
    Abstract: A clock synchronization packet exchanging method includes sending, by a first device in a Flexible Ethernet (FlexE) group, a first FlexE instance at a first physical layer (PHY), where the first FlexE instance includes a clock synchronization packet, and a second FlexE instance sent by the first device in the FlexE group at a second PHY also includes a clock synchronization packet. The clock synchronization packets are carried in a plurality of FlexE instances transmitted between a transmit end and a receive end in the FlexE group.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: September 5, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jingfei Lv, Boling Fan, Jinhui Wang, Liqing Chen
  • Publication number: 20230227786
    Abstract: The present disclosure discloses a preparation method and a recovery method of pariduval mesenchymal stem cells (PMSCs). In the preparation method, a high-glucose Dulbecco's Modified Eagle Medium (DMEM) that includes a Tryple-ethylenediaminetetraacetic acid (EDTA) enzyme of 40% to 60% in volume concentration and collagenase type II of 8 mg/ml to 12 mg/ml is used as a tissue digestion solution to digest tissue blocks, which facilitates PMSCs to climb out of the tissue blocks and grow adherently; and a serum-free DMEM is adopted as a selective medium to terminate the digestion and resuspend PMSCs, which helps to improve a purity of PMSCs, accelerate the growth of PMSCs, and achieve the rapid expansion of PMSCs in vitro.
    Type: Application
    Filed: October 22, 2021
    Publication date: July 20, 2023
    Inventors: Xiaocui Liu, Junrong Xu, Shuyan Tang, Yanlian Deng, Yanyao Meng, Jingli Yang, Jinhui Wang
  • Publication number: 20230212670
    Abstract: The present invention provides a rapid viral nucleic acid detection kit prepared by using a novel RecA enzyme and the detection method thereof. By editing the recombinase RecA gene, the expressed RecA protein has better solubility and recombinase activity. The RecA protein is used to prepare recombinase dry powder, further the formula of the recombinase dry powder and the ratio are optimized; and specific primers for the ASFV p72 gene are designed for the rapid nucleic acid detection of ASFV, significantly improving the detection sensitivity. In addition, the detection time is short, which effectively avoids missed detection and false detection, and helps prevention of epidemic.
    Type: Application
    Filed: June 28, 2022
    Publication date: July 6, 2023
    Inventors: Qi CHENG, Jinhui WANG, Dongjie HU, Jun CHEN, Zixin DENG
  • Patent number: D1089777
    Type: Grant
    Filed: April 26, 2024
    Date of Patent: August 19, 2025
    Inventor: Jinhui Wang
  • Patent number: D1089778
    Type: Grant
    Filed: April 26, 2024
    Date of Patent: August 19, 2025
    Inventor: Jinhui Wang
  • Patent number: D1089779
    Type: Grant
    Filed: April 26, 2024
    Date of Patent: August 19, 2025
    Inventor: Jinhui Wang