Abstract: A dynamic random access memory (DRAM) structure having a distance less than 0.14 um between the contacts to silicon and the gate conductor is disclosed. In addition a method for forming the structure is disclosed, which includes forming the DRAM array contacts and the contacts to silicon simultaneously.

Abstract: Provided are a multi-display supporting multi-view video object-based encoding apparatus and method, and an object-based transmission/reception system and method using the encoding apparatus and method.

Abstract: A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes a plurality of transistors and the periphery region includes a plurality of transistors. The process includes depositing a middle-of-line liner using plasma enhanced chemical vapor deposition overlying the semiconductor structure. By using a plasma enhanced chemical vapor deposition the amount of MOL liner deposited in the core region and the periphery region can be controlled depending on the distances between transistors in the core region and periphery region.

Abstract: A dynamic random access memory (DRAM) structure having a distance less than 0.14 ?m between the contacts to silicon and the gate conductor is disclosed. In addition a method for forming the structure is disclosed, which includes forming the DRAM array contacts and the contacts to silicon simultaneously.

Abstract: A dynamic random access memory (DRAM) structure having a distance less than 0.14 um between the contacts to silicon and the gate conductor is disclosed. In addition a method for forming the structure is disclosed, which includes forming the DRAM array contacts and the contacts to silicon simultaneously.

Abstract: A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes a plurality of transistors and the periphery region includes a plurality of transistors. The process includes depositing a middle-of-line liner using plasma enhanced chemical vapor deposition overlying the semiconductor structure. By using a plasma enhanced chemical vapor deposition the amount of MOL liner deposited in the core region and the periphery region can be controlled depending on the distances between transistors in the core region and periphery region.

Abstract: Provided is a steroscopic video encoding and/or decoding apparatus that supports multi-display modes, the encoding/decoding method thereof, and computer-readable recording medium for recording a program that implements the encoding/decoding method. The encoding apparatus of this research incorporates: a field separating means for separating right and left-eye input images into an odd field of the left-eye image (LO), even field of the left-eye image (LE), odd-numbered field (RO) of the right-eye image, and even-numbered field (RE) of the right-eye image; an encoding means for encoding the fields separated in the field separating means by performing motion and disparity compensation; and a multiplexing means for multiplexing the essential fields among the fields received from the encoding means, based on the user display information.

Abstract: A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes a plurality of transistors and the periphery region includes a plurality of transistors. The process includes depositing a middle-of-line liner using plasma enhanced chemical vapor deposition overlying the semiconductor structure. By using a plasma enhanced chemical vapor deposition the amount of MOL liner deposited in the core region and the periphery region can be controlled depending on the distances between transistors in the core region and periphery region.

Abstract: Disclosed is a stereoscopic/multiview three-dimensional video processing system and its method. In the present invention, stereoscopic/multiview three-dimensional video data having a plurality of images at the same time are coded into a plurality of elementary streams. The plural elementary streams output at the same time are multiplexed according to the user's selected display mode to generate a single elementary stream. After packetization of the single elementary stream continuously generated, information about the stereoscopic/multiview three-dimensional video multiplexing method and the selected display mode information are added to the packet header of the stream. Then the packetized elementary stream is sent to the image reproducer or stored in storage media.

Abstract: A dynamic random access memory (DRAM) structure having a distance less than 0.14 um between the contacts to silicon and the gate conductor is disclosed. In addition a method for forming the structure is disclosed, which includes forming the DRAM array contacts and the contacts to silicon simultaneously.

Abstract: A data processing system and method for stereoscopic 3D video based on MPEG-4. Various elementary streams of left and right images of stereoscopic 3D video are multiplexed into a single stream, and efficient buffer management is performed through field encoding that supports possible display methods. The system minimizes the synchronization time of left and right images and reduces the complexity of the decoder model. Also, a decoding buffer size is allocated to enable support of stereoscopic 3D video field/frame shuttering and stereoscopic 3D video polarized display, while maintaining compatibility with conventional 2D video data processing. Finally, only DTS and CTS are transmitted at the same time, and DTS and CTS of the remaining times are estimated to thereby simplify synchronization.

Abstract: A delay lock loop circuit includes a forward delay circuit having a plurality of delay elements. Each delay element has a delay time of one unit delay time. The forward delay circuit and each of the delay elements are powered by a supply voltage. The supply voltage is set to thereby set the duration of a unit delay time. Moreover, a feedback delay circuit is provided in order to cause a feedback delay time being substantially equal to a propagation delay of the IC. As the operating conditions of IC change, and the propagation delay thereof increases or decreases, the feedback delay time changes accordingly, and thus the delay caused by forward delay circuit tracks the change in the propagation delay of the IC.

Abstract: A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes a plurality of transistors and the periphery region includes a plurality of transistors. The process includes depositing a middle-of-line liner using plasma enhanced chemical vapor deposition overlying the semiconductor structure. By using a plasma enhanced chemical vapor deposition the amount of MOL liner deposited in the core region and the periphery region can be controlled depending on the distances between transistors in the core region and periphery region.

Abstract: Disclosed is a contents conversion apparatus which includes; a demultiplexer for demultiplexing an externally input broadcasting stream of a first broadcasting standard and dividing it into an audio stream, a video stream, and a data stream; a converter for converting a coding format of the audio stream to a coding format of a desired second broadcasting standard, and converting a broadcasting service format of the data stream to a service format of the second broadcasting standard; a protocol server for providing a protocol stream of the second broadcasting standard; and a multiplexer for multiplexing the audio stream and the data stream output from the converter, the video stream and the protocol stream to generate one transfer stream.

Abstract: The null packet insertion apparatus includes: a null packet remover for removing an irregularly inserted null packet from an externally received video/audio transport stream; a null packet bit rate calculator for calculating a bit rate of the removed null packet; a GUI for determining the transmission period of a periodic null packet to be newly inserted, based on the calculated bit rate, by an external user; a periodic null packet generator for generating a periodic null packet according to the determined transmission period; a multiplexer for regularly inserting the periodic null packet preferentially and inserting the video/audio transport stream with the irregular null packet removed, and performing multiplexing; a non-periodic null packet generator for generating a non-periodic null packet and inserting the generated non-periodic null packet, when an output rate of the multiplexed transport stream is not equal to an input rate of the externally received video/audio transport stream; and a PCR corrector f

Abstract: Disclosed is a digital broadcast protocol conversion system including: a PSIP/PSI extractor for demultiplexing a transport stream of an ATSC broadcast standard to extract PSIP/PSI data; an SI/PSI extractor for demultiplexing a transport stream of a DVB broadcast standard to extract SI/PSI data; a protocol converter for converting the PSIP/PSI data to SI′/PSI′ data corresponding to a broadcast protocol of the DVB broadcast standard or converting the SI/PSI data to PSIP′/PSI′ data corresponding to a broadcast protocol of the ATSC broadcast standard; and a multiplexer for multiplexing the SI′/PSI′ data and the transport stream having the PSIP/PSI data extracted therefrom, or multiplexing the PSIP′/PSI′ data and the transport stream having the PSIP/PSI data extracted therefrom, thereby converting the broadcast protocol between different broadcast standards.

Abstract: A delay lock loop circuit includes a variable voltage regulator and a forward delay circuit. The variable voltage regulator receives an external supply voltage and issues a variable supply voltage. The forward delay circuit is powered by the variable supply voltage.

Abstract: Disclosed is a stereoscopic/multiview three-dimensional video processing system and its method. In the present invention, stereoscopic/multiview three-dimensional video data having a plurality of images at the same time are coded into a plurality of elementary streams. The plural elementary streams output at the same time are multiplexed according to the user's selected display mode to generate a single elementary stream. After packetization of the single elementary stream continuously generated, information about the stereoscopic/multiview three-dimensional video multiplexing method and the selected display mode information are added to the packet header of the stream. Then the packetized elementary stream is sent to the image reproducer or stored in storage media.