Patents by Inventor Jinjian ZHENG

Jinjian ZHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250143016
    Abstract: Semiconductor light-emitting devices are provided, which includes a substrate, a Negative-type semiconductor, a quantum well, an electron-blocking layer, and a Positive-type semiconductor arranged in a sequential stack. The quantum well includes a first quantum well, a second quantum well, and a third quantum well. Optical parameters of the first quantum well, the second quantum well, and the third quantum well are distributed in a gradient in at least one direction. The quantum well includes a periodic structure consisting of a well layer and a barrier layer. A coefficient of thermal expansion of the well layer is smaller than or equal to that of the barrier layer. An elastic coefficient of the well layer is smaller than or equal to that of the barrier layer. A lattice constant of the well layer is greater than or equal to that of the barrier layer. A coefficient of spontaneous polarization of the well layer is smaller than or equal to that of spontaneous polarization of the barrier layer.
    Type: Application
    Filed: December 29, 2023
    Publication date: May 1, 2025
    Applicant: ANHUI GAN SEMICONDUCTOR CO., LTD.
    Inventors: Shuiqing LI, Jinjian ZHENG, Jiabin LAN, Zhiyong HU, Wanjun CHEN
  • Publication number: 20250141190
    Abstract: Disclosed is a semiconductor laser, from bottom to top, comprising: a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer, and an upper limiting layer. The lower limiting layer is composed of at least one of AllnGaN, AllnN, AlGaN, InN, AlN, InGaN, and GaN. A thickness of the lower limiting layer is denoted as x, and 10 angstroms?x?90,000 angstroms. The lower limiting layer includes a first lower limiting layer, a second lower limiting layer, and a third lower limiting layer. The lower limiting layer forms an electron saving structure and a stress regulating structure to regulate a carrier distribution and a stress distribution of the active layer, thereby reducing a threshold current and improving a slope efficiency of the laser.
    Type: Application
    Filed: December 29, 2023
    Publication date: May 1, 2025
    Applicant: ANHUI GAN SEMICONDUCTOR CO., LTD.
    Inventors: Jinjian ZHENG, Shuiqing LI, Jiangyong ZHANG, Wanjun CHEN, Xin CAI
  • Publication number: 20250141191
    Abstract: The present disclosure provides a semiconductor green laser. The semiconductor green laser, from bottom to top, comprising a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer, and an upper limiting layer. The active layer is a quantum well composed of well layers and barrier layers. Each of the well layers includes any one of AlInGaN, AlInN, AlGaN, AlN, InN, InGaN, and GaN, or any combination thereof. Each of the barrier layers includes any one of AlInGaN, AlInN, AlGaN, AlN, InN, InGaN, and GaN, or any combination thereof. An electron effective mass of each of the well layers is less than an electron effective mass of each of the barrier layers. A spontaneous polarization coefficient of each of the well layers is less than a spontaneous polarization coefficient of each of the barrier layers.
    Type: Application
    Filed: December 29, 2023
    Publication date: May 1, 2025
    Applicant: ANHUI GAN SEMICONDUCTOR CO., LTD.
    Inventors: Jinjian ZHENG, Shuiqing LI, Xin CAI, Wanjun CHEN, Jiabin LAN, Jiangyong ZHANG
  • Publication number: 20240345038
    Abstract: This invention describes a novel method encompassing preparing a nitrosamine sample. adding in relevant chemicals that reduces or eliminates in situ nitrosamine formation, utilizing full evaporation static headspace gas chromatograph coupled with nitrogen phosphorous detector (FE-SHSGC-NPD), and analysis of rapid results in the gaseous phase for sensitive detection of semi-volatile nitrosamines, including ND.MA.
    Type: Application
    Filed: July 11, 2022
    Publication date: October 17, 2024
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Rebecca Evans, Xinxin Han, Daniel E. Lee, Christine L. Radich, Jinjian Zheng
  • Patent number: 12119615
    Abstract: Disclosed is a semiconductor laser with a substrate mode suppression layer, comprising a substrate, a first limiting layer, a first waveguide layer, an active layer, a second waveguide layer, an electron blocking layer, and a second limiting layer sequentially stacked from bottom to top. A Si/C concentration ratio of an element Si to an element C of the substrate mode suppression layer?that of the first sub-limiting layer?that of the second sub-limiting layer. An In/Al concentration ratio of an element In to an element Al of the substrate mode suppression layer?that of the first sub-limiting layer?that of the second sub-limiting layer. An H/C concentration ratio of an element H to an element C of the substrate mode suppression layer?that of the second sub-limiting layer?that of the first sub-limiting layer.
    Type: Grant
    Filed: April 17, 2024
    Date of Patent: October 15, 2024
    Assignee: ANHUI GAN SEMICONDUCTOR CO., LTD.
    Inventors: Shuiqing Li, Hongzhu Kan, Jinjian Zheng, Xinghe Wang, Xin Cai, Wanjun Chen, Jiangyong Zhang, Jun Huang, Zihan Liu
  • Publication number: 20240332894
    Abstract: Disclosed is a semiconductor laser with a substrate mode suppression layer, comprising a substrate, a first limiting layer, a first waveguide layer, an active layer, a second waveguide layer, an electron blocking layer, and a second limiting layer sequentially stacked from bottom to top. A Si/C concentration ratio of an element Si to an element C of the substrate mode suppression layer?that of the first sub-limiting layer?that of the second sub-limiting layer. An In/Al concentration ratio of an element In to an element Al of the substrate mode suppression layer?that of the first sub-limiting layer?that of the second sub-limiting layer. An H/C concentration ratio of an element H to an element C of the substrate mode suppression layer?that of the second sub-limiting layer?that of the first sub-limiting layer.
    Type: Application
    Filed: April 17, 2024
    Publication date: October 3, 2024
    Applicant: ANHUI GAN SEMICONDUCTOR CO., LTD.
    Inventors: Shuiqing LI, Hongzhu KAN, Jinjian ZHENG, Xinghe WANG, Xin CAI, Wanjun CHEN, Jiangyong ZHANG, Jun HUANG, Zihan LIU
  • Publication number: 20240204134
    Abstract: A semiconductor light emitting element and a manufacture method thereof are provided. The semiconductor light emitting element includes: a substrate, an n-type semiconductor layer, a quantum well layer and a p-type semiconductor layer being arranged sequentially from bottom to top, and further includes a surface plasmon excition layer being arranged on the p-type semiconductor layer and a surface plasmon excited layer being arranged between the quantum well layer and the p-type semiconductor layer, or the surface plasmon excitation layer being arranged between the p-type semiconductor layer and the surface plasmon excitation layer, or the surface plasmon excitation layers being arranged respectively between the quantum well layer and the p-type semiconductor layer and between the p-type semiconductor layer and the surface plasmon excitation layer.
    Type: Application
    Filed: March 1, 2022
    Publication date: June 20, 2024
    Inventors: Jinjian Zheng, Moran Gao, Jingfeng Bi, Weihong Fan, Senlin Li, Jiaming Zeng, Yuanjie Wu, Chengjun Zhang
  • Publication number: 20240204133
    Abstract: A semiconductor light emitting element is provided and includes: a substrate, an n-type semiconductor layer, a doped quantum well layer, a control layer for suppressing light attenuation with age and a p-type semiconductor layer from bottom to top. The control layer for suppressing light attenuation with age sequentially includes an undoped quantum well layer having at least one undoped barrier layer, a first control layer for suppressing light attenuation and/or a second control layer for suppressing light attenuation from bottom to top. The present disclosure reduces probability of Si of the doped quantum well layer and Mg of the p-type semiconductor layer diffusing and coming into contact with each other during long-term aging process, thereby suppressing light attenuation with age of the semiconductor light emitting element. A light attenuation of 1000 hours is reduced from 30% or higher (even 50% or higher) to within 10%.
    Type: Application
    Filed: March 1, 2022
    Publication date: June 20, 2024
    Inventors: Jinjian Zheng, Moran Gao, Jingfeng Bi, Weihong Fan, Jiaming Zeng, Chengjun Zhang
  • Patent number: 11804584
    Abstract: A micro light-emitting device includes a support substrate, at least one micro light-emitting element, and a support structure. The support structure includes a bonding layer, an electrically conductive layer, and a protective insulation layer. The micro light-emitting element is supported by the support structure on the support substrate. The micro light-emitting element includes a light-emitting structure and first and second electrodes. First and second contact regions of the first electrode are respectively connected to a supporting post portion of the electrically conductive layer and a surrounding post portion of the protective insulation layer. A production method of the device and use of the element are also disclosed.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: October 31, 2023
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhibai Zhong, Chia-En Lee, Jinjian Zheng, Zheng Wu, Chen-Ke Hsu, Junyong Kang
  • Patent number: 11557580
    Abstract: A mass transfer method includes providing a transfer unit and a semiconductor carrying unit connected therewith, removing an element supporting structure of the semiconductor carrying unit from micro semiconductor elements of the semiconductor carrying unit, partially removing the photosensitive layer to form connecting structures, connecting a package substrate with electrodes of the micro semiconductor elements, breaking the connecting structures to separate the micro semiconductor elements from the transfer substrate. A mass transfer device is also disclosed.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: January 17, 2023
    Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.
    Inventors: Zhibai Zhong, Chia-En Lee, Jinjian Zheng, Jiansen Zheng, Chen-Ke Hsu, Junyong Kang
  • Publication number: 20210407978
    Abstract: A mass transfer method includes providing a transfer unit and a semiconductor carrying unit connected therewith, removing an element supporting structure of the semiconductor carrying unit from micro semiconductor elements of the semiconductor carrying unit, partially removing the photosensitive layer to form connecting structures, connecting a package substrate with electrodes of the micro semiconductor elements, breaking the connecting structures to separate the micro semiconductor elements from the transfer substrate. A mass transfer device is also disclosed.
    Type: Application
    Filed: September 10, 2021
    Publication date: December 30, 2021
    Inventors: Zhibai ZHONG, Chia-En LEE, Jinjian ZHENG, Jiansen ZHENG, Chen-Ke HSU, Junyong KANG
  • Patent number: 11127723
    Abstract: A mass transfer method includes forming a photosensitive layer on a transfer substrate, heating the photosensitive layer at a temperature for the same to be in a partially cured state, disposing micro semiconductor elements on the photosensitive layer in the partially cured state, partially removing the photosensitive layer to form connecting structures, providing a package substrate and metallic support members, subjecting the metallic support members and the micro semiconductor elements to a eutectic process, breaking the connecting structures to separate the micro semiconductor elements from the transfer substrate, and removing the remaining connecting structures from the micro semiconductor elements.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: September 21, 2021
    Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.
    Inventors: Zhibai Zhong, Chia-En Lee, Jinjian Zheng, Jiansen Zheng, Chen-Ke Hsu, Junyong Kang
  • Patent number: 11101239
    Abstract: A process for packaging at least one component includes the steps of: a) providing a substrate and a packaging material layer, b) forming the packaging material layer into an adhesively semi-cured packaging material layer, c) adhering the adhesively semi-cured packaging material layer to an array, d) providing a packaging unit including at least one eutectic metal bump pair, e) permitting the eutectic metal bump pair to be in contact with at least one electrode pair on the array, f) subjecting the electrode pair to eutectic bonding to the eutectic metal bump pair, g) encapsulating the component by pressing, h) completely curing the adhesively semi-cured packaging material layer, and i) removing the substrate.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: August 24, 2021
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhibai Zhong, Chia-en Lee, Jinjian Zheng, Lixun Yang, Chen-ke Hsu, Junyong Kang
  • Patent number: 11043613
    Abstract: A light emitting diode (LED) device includes a light emitting epitaxial layer having opposite first and second surfaces and a plurality of microlenses formed on the first surface. The light emitting epitaxial layer includes a first type semiconductor layer defining the first surface, a second type semiconductor layer defining the second surface, and a light emitting layer disposed between the first and second type semiconductor layers and spaced apart from the first and second surfaces. The microlenses are formed on the first surface and formed of a light transmissible substrate for epitaxial growth of the light emitting epitaxial layer. A method for manufacturing the light emitting diode device is also disclosed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: June 22, 2021
    Assignee: Xiamen San'An Optoelectronics Co., Ltd.
    Inventors: Zhibai Zhong, Jinjian Zheng, Lixun Yang, Chia-En Lee, Chen-Ke Hsu, Junyong Kang
  • Publication number: 20210013388
    Abstract: A micro light-emitting device includes a support substrate, at least one micro light-emitting element, and a support structure. The support structure includes a bonding layer, an electrically conductive layer, and a protective insulation layer. The micro light-emitting element is supported by the support structure on the support substrate. The micro light-emitting element includes a light-emitting structure and first and second electrodes. First and second contact regions of the first electrode are respectively connected to a supporting post portion of the electrically conductive layer and a surrounding post portion of the protective insulation layer. A production method of the device and use of the element are also disclosed.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 14, 2021
    Inventors: Zhibai ZHONG, Chia-En LEE, Jinjian ZHENG, Zheng WU, Chen-Ke HSU, Junyong KANG
  • Publication number: 20200335383
    Abstract: A micro device transferring apparatus includes a first conveying mechanism, a carrier unit, a push device and a release device. The first conveying mechanism includes a release tape having a release adhesive, a first roller connected to an end of the release tape, and a conveying device connected to a horizontal section of the release tape to drive the release tape to move in a moving direction. The carrier unit includes a first carrier holding multiple micro devices, and a second carrier for receiving the micro devices. The push device is for pushing the release tape to pick up the micro devices with the release adhesive. The release device is for decomposing the release adhesive to release the micro devices.
    Type: Application
    Filed: June 17, 2020
    Publication date: October 22, 2020
    Inventors: CHEN-KE HSU, ZHIBAI ZHONG, CHIA-EN LEE, JINJIAN ZHENG, ZHENG WU, SHAO-YING TING
  • Publication number: 20200273848
    Abstract: A mass transfer method includes forming a photosensitive layer on a transfer substrate, heating the photosensitive layer at a temperature for the same to be in a partially cured state, disposing micro semiconductor elements on the photosensitive layer in the partially cured state, partially removing the photosensitive layer to form connecting structures, providing a package substrate and metallic support members, subjecting the metallic support members and the micro semiconductor elements to a eutectic process, breaking the connecting structures to separate the micro semiconductor elements from the transfer substrate, and removing the remaining connecting structures from the micro semiconductor elements.
    Type: Application
    Filed: May 15, 2020
    Publication date: August 27, 2020
    Inventors: ZHIBAI ZHONG, CHIA-EN LEE, JINJIAN ZHENG, JIANSEN ZHENG, CHEN-KE HSU, JUNYONG KANG
  • Publication number: 20200258861
    Abstract: A process for packaging at least one component includes the steps of: a) providing a substrate and a packaging material layer, b) forming the packaging material layer into an adhesively semi-cured packaging material layer, c) adhering the adhesively semi-cured packaging material layer to an array, d) providing a packaging unit including at least one eutectic metal bump pair, e) permitting the eutectic metal bump pair to be in contact with at least one electrode pair on the array, f) subjecting the electrode pair to eutectic bonding to the eutectic metal bump pair, g) encapsulating the component by pressing, h) completely curing the adhesively semi-cured packaging material layer, and i) removing the substrate.
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Inventors: Zhibai ZHONG, Chia-en LEE, Jinjian ZHENG, Lixun YANG, Chen-ke HSU, Junyong KANG
  • Publication number: 20190319172
    Abstract: A light emitting diode (LED) device includes a light emitting epitaxial layer having opposite first and second surfaces and a plurality of microlenses formed on the first surface. The light emitting epitaxial layer includes a first type semiconductor layer defining the first surface, a second type semiconductor layer defining the second surface, and a light emitting layer disposed between the first and second type semiconductor layers and spaced apart from the first and second surfaces. The microlenses are formed on the first surface and formed of a light transmissible substrate for epitaxial growth of the light emitting epitaxial layer. A method for manufacturing the light emitting diode device is also disclosed.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Inventors: ZHIBAI ZHONG, JINJIAN ZHENG, LIXUN YANG, CHIA-EN LEE, CHEN-KE HSU, JUNYONG KANG
  • Patent number: 10276750
    Abstract: A bonding electrode structure of a flip-chip LED chip includes: a substrate; a light-emitting epitaxial layer over the substrate; a bonding electrode over the light-emitting epitaxial layer, wherein the bonding electrode structure includes a metal laminated layer having a bottom layer and an upper surface layer from bottom up. The bottom layer structure is oxidable metal and the side wall forms an oxide layer. The upper surface layer is non-oxidable metal. The bonding electrode structure has a main contact portion, and a grid-shape portion surrounding the main contact portion in a horizontal direction. The problems during packaging and soldering of the flip-chip LED chip structure, such as short circuit or electric leakage, can thus be solved.
    Type: Grant
    Filed: December 31, 2017
    Date of Patent: April 30, 2019
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhibai Zhong, Lixun Yang, Jinjian Zheng, Chia-en Lee, Chen-ke Hsu, Junyong Kang