Abstract: Solid state neutron detection utilizing gadolinium as a neutron absorber is described. The new class of narrow-gap neutron-absorbing semiconducting materials, including Gd-doped HfO2, Gd-doped EuO, Gd-doped GaN, Gd2O3 and GdN are included in three types of device structures: (1) a p-n heterostructure diode with a ˜30 ?m Gd-loaded semiconductor grown on a conventional semiconductor (Si or B-doped Si); (2) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron one side and single-crystal semiconducting Li2B4O7 layer on the other side of the heterojunction; and (3) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron on one side and a boron nitride (BN) semiconductor layer on the other side of the heterojunction.

Abstract: Solid state neutron detection utilizing gadolinium as a neutron absorber is described. The new class of narrow-gap neutron-absorbing semiconducting materials, including Gd-doped HfO2, Gd-doped EuO, Gd-doped GaN, Gd2O3 and GdN are included in three types of device structures: (1) a p-n heterostructure diode with a ˜30 ?m Gd-loaded semiconductor grown on a conventional semiconductor (Si or B-doped Si); (2) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron one side and single-crystal semiconducting Li2B4O7 layer on the other side of the heterojunction; and (3) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron on one side and a boron nitride (BN) semiconductor layer on the other side of the heterojunction.

Abstract: A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

Abstract: A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

Abstract: A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

Abstract: A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

Abstract: A spin transistor employing the ferromagnetic semiconductor/semiconductor heterojunction is disclosed. The ferromagnetic semiconductor layers form heterojunctions directly on the source and drain of a regular field effect transistor. Using room temperature ferromagnetic semiconductor materials such as iron doped titanium oxide, the spin transistor can have improved spin injection efficiency due to the conductance matching of the ferromagnetic semiconductor with the semiconductor source and drain. The spin transistor further comprises writing plates to modify the magnetic polarization of the ferromagnetic layers to provide memory states. The spin transistor can be used as a memory cell in a magnetic random access memory with potentially large memory signal by utilizing the magnetic moment induced resistivity change.

Abstract: The magnetic and magnetotransport properties of field-aligned single domain half-metallic CrO2 powders have been studied. Needle-shaped nanoparticles of CrO2 have been aligned in a strong magnetic field. The aligned powder sample shows a strong anisotropy along the alignment direction. The conduction mechanism of the aligned CrO2 powder sample has been examined and is consistent with the intergranular spin dependent tunneling. Negative tunneling magnetoresistance (TMR) of about 41% is achieved in a small field in the vicinity of the coercive field at 5 K. The magnetoresistance (MR) versus field curve shows two well-separated narrow peaks at the coercive fields and resembles that of a magnetic tunnel junction. This junction-like MR results from the narrow switching field distribution of the aligned powders. The results suggest that the aligned magnetic CrO2 particles may find novel applications in spin transport structures and devices.