Patents by Inventor Jinkyu JEONG

Jinkyu JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139368
    Abstract: An air purifying performance evaluation device includes a chamber which accommodates an inspection object, a stirring fan which circulates air inside the chamber, a sterilizer configured sterilize microorganisms inside the chamber, a microorganism injector which injects microorganisms from the outside of the chamber into the inside of the chamber, and a sampling assembly which obtains a sample of microorganisms inside the chamber.
    Type: Application
    Filed: May 19, 2023
    Publication date: May 2, 2024
    Inventors: Jaeeun KIM, Joonseon JEONG, Jinkyu KANG, Dongwook KIM
  • Publication number: 20230019101
    Abstract: Provided is an operation method of a NUMA system, which includes: designating a page scan range including a plurality of pages; identifying a detour value for each of the plurality of pages; determining whether a detour value of a current target scan page is the same as the reference detour value; and releasing a connection of the current target scan page from the page table when determining that the detour value of the current target scan page is the same as the reference detour value.
    Type: Application
    Filed: July 18, 2022
    Publication date: January 19, 2023
    Applicants: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, High Performance Computins Research Center
    Inventors: Jinkyu JEONG, Jaehyun SONG
  • Patent number: 11436064
    Abstract: A processing method includes: performing an I/O preparation process and an I/O request for a data block in an application program thread; activating, by the application program thread, a journaling thread; waiting for completion of an I/O for the data block and a commit of the journaling thread; preparing an I/O for the journal block and requesting the I/O for the journal block during the waiting for the completion of the I/O for the data block and the commit of the journaling thread, in the journaling thread; preparing an I/O for a journal commit block, before waiting for completion of the I/O for the journal block after the requesting of the I/O for the journal block; after waiting for the completion of the I/O for the journal block, requesting the I/O for the journal commit block; and waiting for completion of the I/O for the journal commit block.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: September 6, 2022
    Assignees: Research & Business Foundation Sungkyunkwan University, HIGH PERFORMANCE COMPUTING RESEARCH CENTER
    Inventors: Jinkyu Jeong, Gyusun Lee
  • Patent number: 11436150
    Abstract: Disclosed is a method for processing a page fault. The method includes performing demand paging depending on an application operation in a system including a processor and an operating system, and loading, at the processor, data on a memory in response to the demand paging.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 6, 2022
    Assignees: Research & Business Foundation Sungkyunkwan University, SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jinkyu Jeong, Jae Wook Lee, Gyusun Lee, Wenjing Jin, Tae Jun Ham
  • Publication number: 20220269442
    Abstract: A method of queuing command comprises: comparing a first virtual time of a first command with a second virtual time of a second command and obtaining a comparison result; determining a standard global virtual time from the first virtual time and the second virtual time on the basis of the comparison result; and sending each of the first and second commands to one of a first priority class queue, a second priority class queue, and a third priority class queue, based on a difference between the first virtual time and the global virtual time, and a difference between the second virtual time and the global virtual time, wherein each of the first to third priority class queues has processing speeds that differ from each other.
    Type: Application
    Filed: August 16, 2021
    Publication date: August 25, 2022
    Inventors: Jinkyu Jeong, Jiwon Woo
  • Patent number: 11379371
    Abstract: A data management system includes a data storage device, a buffer memory, and a controller. The buffer memory is configured to temporally store data read during a reading operation of the data storage device. The controller is configured to, after transmitting a data input/output (I/O) instruction to the data storage device upon an indication of a data reading request, allocate the buffer memory, register a buffer cache of the buffer memory, allocate a direct memory access (DMA) address for the buffer memory, and release the DMA address.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: July 5, 2022
    Assignees: Research & Business Foundation Sungkyunkwan University, High Performance Computing Research Center
    Inventors: Jinkyu Jeong, Gyusun Lee
  • Publication number: 20210374063
    Abstract: Disclosed is a method for processing a page fault. The method includes performing demand paging depending on an application operation in a system including a processor and an operating system, and loading, at the processor, data on a memory in response to the demand paging.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 2, 2021
    Applicants: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jinkyu JEONG, Jae Wook LEE, Gyusun LEE, Wenjing JIN, Tae Jun HAM
  • Publication number: 20210263789
    Abstract: A processing method includes: performing an I/O preparation process and an I/O request for a data block in an application program thread; activating, by the application program thread, a journaling thread; waiting for completion of an I/O for the data block and a commit of the journaling thread; preparing an I/O for the journal block and requesting the I/O for the journal block during the waiting for the completion of the I/O for the data block and the commit of the journaling thread, in the journaling thread; preparing an I/O for a journal commit block, before waiting for completion of the I/O for the journal block after the requesting of the I/O for the journal block; after waiting for the completion of the I/O for the journal block, requesting the I/O for the journal commit block; and waiting for completion of the I/O for the journal commit block.
    Type: Application
    Filed: February 26, 2021
    Publication date: August 26, 2021
    Applicants: Research & Business Foundation Sungkyunkwan University, High Performance Computing Research Center
    Inventors: Jinkyu JEONG, Gyusun LEE
  • Publication number: 20210141727
    Abstract: A data management system includes a data storage device, a buffer memory, and a controller. The buffer memory is configured to temporally store data read during a reading operation of the data storage device. The controller is configured to, after transmitting a data input/output (I/O) instruction to the data storage device upon an indication of a data reading request, allocate the buffer memory, register a buffer cache of the buffer memory, allocate a direct memory access (DMA) address for the buffer memory, and release the DMA address.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 13, 2021
    Applicants: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, HIGH PERFORMANCE COMPUTING RESEARCH CENTER
    Inventors: Jinkyu JEONG, Gyusun LEE
  • Patent number: 10198174
    Abstract: Disclosed is a method of managing a memory of an electronic device, including: dividing a physical memory into one or more regions including consecutive pages; when there is a memory allocation request of a process or an operating system, allocating a physical memory space to a region including a free page; and configuring a domain by collecting one or more regions having the same characteristic among the regions, to which the memory is allocated.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: February 5, 2019
    Assignees: Samsung Electronics Co., Ltd., Sungkyunkwan University Research & Business Foundation
    Inventors: Jin-Soo Kim, Jinkyu Jeong
  • Patent number: 9836220
    Abstract: A method of operating a data processing system includes transmitting process information indicating that a first process is classified as a critical process or a non-critical process to a kernel area, wherein the process information is generated in an application area, and the application area and the kernel area define a host. When the first process is classified as a critical process based on the process information, a first fastpath write signal is provided, using the kernel area, to a memory system to perform a fastpath write operation of first data for performing the first process. When the first process is classified as a non-critical process, a first slowpath write signal is provided to the memory system to perform a slowpath write operation of the first data. The fastpath write operation has a higher write speed than the slowpath write operation.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: December 5, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Won Jeong, Sangwook Kim, Joonwon Lee, Jinkyu Jeong, Hwanju Kim
  • Patent number: 9804801
    Abstract: A method of processing data in a memory system including a control unit and a hybrid memory device having a first memory and a second memory, includes; receiving first write data, storing the first write data in the first memory and assigning a first group state from among a plurality of group states to the stored first write data in response to first attribution information, completing a data processing operation in the memory system directed to the stored first write data that changes the attribution information associated with the stored first write data by monitoring of the first attribution information using an operating system running on the memory controller, and changing the first group state assigned to the stored first write data to a second group state from among the plurality of group states, the second group state having a different priority than a priority for the first group state.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: October 31, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangkwon Moon, Jin-Soo Kim, Young-Sik Lee, Jinkyu Jeong, Kyung Ho Kim
  • Publication number: 20160357473
    Abstract: Disclosed is a method of managing a memory of an electronic device, including: dividing a physical memory into one or more regions including consecutive pages; when there is a memory allocation request of a process or an operating system, allocating a physical memory space to a region including a free page; and configuring a domain by collecting one or more regions having the same characteristic among the regions, to which the memory is allocated.
    Type: Application
    Filed: June 3, 2016
    Publication date: December 8, 2016
    Inventors: Jin-Soo Kim, Jinkyu Jeong
  • Patent number: 9367476
    Abstract: The present invention discloses a memory management apparatus, method, and system. An OS-based memory management apparatus associated with main memory includes a memory allocation controller configured to control a first memory region within the main memory such that the first memory region is used as a buffer cache depending on whether an input/output device is active or not in order to use the first memory region, allowing memory reservation for the input/output device, in the OS. The memory allocation controller controls the first memory region such that the first memory region is used as an eviction-based cache.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: June 14, 2016
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Joonwon Lee, Jinkyu Jeong, Hwanju Kim, Jaeho Hwang
  • Publication number: 20160110103
    Abstract: A method of operating a data processing system includes transmitting process information indicating that a first process is classified as a critical process or a non-critical process to a kernel area, wherein the process information is generated in an application area, and the application area and the kernel area define a host. When the first process is classified as a critical process based on the process information, a first fastpath write signal is provided, using the kernel area, to a memory system to perform a fastpath write operation of first data for performing the first process. When the first process is classified as a non-critical process, a first slowpath write signal is provided to the memory system to perform a slowpath write operation of the first data. The fastpath write operation has a higher write speed than the slowpath write operation.
    Type: Application
    Filed: July 6, 2015
    Publication date: April 21, 2016
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: SUNG-WON JEONG, SANGWOOK KIM, JOONWON LEE, JINKYU JEONG, HWANJU KIM
  • Publication number: 20150278104
    Abstract: A method of processing data in a memory system including a control unit and a hybrid memory device having a first memory and a second memory, includes; receiving first write data, storing the first write data in the first memory and assigning a first group state from among a plurality of group states to the stored first write data in response to first attribution information, completing a data processing operation in the memory system directed to the stored first write data that changes the attribution information associated with the stored first write data by monitoring of the first attribution information using an operating system running on the memory controller, and changing the first group state assigned to the stored first write data to a second group state from among the plurality of group states, the second group state having a different priority than a priority for the first group state.
    Type: Application
    Filed: March 24, 2015
    Publication date: October 1, 2015
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERISTY
    Inventors: SANGKWON MOON, JIN-SOO KIM, YOUNG-SIK LEE, JINKYU JEONG, KYUNG HO KIM
  • Publication number: 20140156944
    Abstract: The present invention discloses a memory management apparatus, method, and system. An OS-based memory management apparatus associated with main memory includes a memory allocation controller configured to control a first memory region within the main memory such that the first memory region is used as a buffer cache depending on whether an input/output device is active or not in order to use the first memory region, allowing memory reservation for the input/output device, in the OS. The memory allocation controller controls the first memory region such that the first memory region is used as an eviction-based cache.
    Type: Application
    Filed: October 7, 2013
    Publication date: June 5, 2014
    Inventors: Joonwon LEE, Jinkyu JEONG, Hwanju KIM, Jaeho HWANG