Patents by Inventor Jinman Yang

Jinman Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-electron-mobility transistor with buried interconnect
    Patent number: 10665711
    Abstract: A high-electron-mobility transistor (HEMT) includes a substrate layer of silicon, a first contact disposed on a first surface of the substrate layer, and a number of layers disposed on a second surface of the substrate layer opposite the first surface. A second contact and a gate contact are disposed on those layers. A trench containing conducting material extends completely through the layers and into the substrate layer. In an embodiment of the HEMT, the first contact is a drain contact and the second contact is a source contact. In another embodiment of the HEMT, the first contact is a source contact and the second contact is a drain contact.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 26, 2020
    Assignee: VISHAY SILICONIX, LLC
    Inventors: Ayman Shibib, Kyle Terrill, Yongping Ding, Jinman Yang
  • HIGH-ELECTRON-MOBILITY TRANSISTOR WITH BURIED INTERCONNECT
    Publication number: 20190312137
    Abstract: A high-electron-mobility transistor (HEMT) includes a substrate layer of silicon, a first contact disposed on a first surface of the substrate layer, and a number of layers disposed on a second surface of the substrate layer opposite the first surface. A second contact and a gate contact are disposed on those layers. A trench containing conducting material extends completely through the layers and into the substrate layer. In an embodiment of the HEMT, the first contact is a drain contact and the second contact is a source contact. In another embodiment of the HEMT, the first contact is a source contact and the second contact is a drain contact.
    Type: Application
    Filed: June 24, 2019
    Publication date: October 10, 2019
    Inventors: Ayman SHIBIB, Kyle TERRILL, Yongping DING, Jinman YANG
  • High-electron-mobility transistor with buried interconnect
    Patent number: 10381473
    Abstract: A high-electron-mobility transistor (HEMT) includes a substrate layer of silicon, a first contact disposed on a first surface of the substrate layer, and a number of layers disposed on a second surface of the substrate layer opposite the first surface. A second contact and a gate contact are disposed on those layers. A trench containing conducting material extends completely through the layers and into the substrate layer. In an embodiment of the HEMT, the first contact is a drain contact and the second contact is a source contact. In another embodiment of the HEMT, the first contact is a source contact and the second contact is a drain contact.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: August 13, 2019
    Assignee: VISHAY-SILICONIX
    Inventors: Ayman Shibib, Kyle Terrill, Yongping Ding, Jinman Yang
  • HIGH-ELECTRON-MOBILITY TRANSISTOR WITH BURIED INTERCONNECT
    Publication number: 20180158942
    Abstract: A high-electron-mobility transistor (HEMT) includes a substrate layer of silicon, a first contact disposed on a first surface of the substrate layer, and a number of layers disposed on a second surface of the substrate layer opposite the first surface. A second contact and a gate contact are disposed on those layers. A trench containing conducting material extends completely through the layers and into the substrate layer. In an embodiment of the HEMT, the first contact is a drain contact and the second contact is a source contact. In another embodiment of the HEMT, the first contact is a source contact and the second contact is a drain contact.
    Type: Application
    Filed: July 6, 2017
    Publication date: June 7, 2018
    Inventors: Ayman SHIBIB, Kyle TERRILL, Yongping DING, Jinman YANG
  • Complementary zener triggered bipolar ESD protection
    Patent number: 7701012
    Abstract: An electrostatic discharge (ESD) protection clamp (61) for I/O terminals (22, 23) of integrated circuits (ICs) (24) comprises an NPN bipolar transistor (25) coupled to an integrated Zener diode (30). Variations in the break-down current-voltage characteristics (311, 312, 313, 314) of multiple prior art ESD clamps (31) in different parts of the same IC chip is avoided by forming the anode (301) of the Zener (30) in the shape of a base-coupled P+ annular ring (75) surrounded by a spaced-apart N+ annular collector ring (70) for the cathode (302) of the Zener (30).
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: April 20, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hongzhong Xu, Chai Ean Gill, James D. Whitfield, Jinman Yang
  • COMPLEMENTARY ZENER TRIGGERED BIPOLAR ESD PROTECTION
    Publication number: 20080203534
    Abstract: An electrostatic discharge (ESD) protection clamp (61) for I/O terminals (22, 23) of integrated circuits (ICs) (24) comprises an NPN bipolar transistor (25) coupled to an integrated Zener diode (30). Variations in the break-down current-voltage characteristics (311, 312, 313, 314) of multiple prior art ESD clamps (31) in different parts of the same IC chip is avoided by forming the anode (301) of the Zener (30) in the shape of a base-coupled P+ annular ring (75) surrounded by a spaced-apart N+ annular collector ring (70) for the cathode (302) of the Zener (30).
    Type: Application
    Filed: February 26, 2007
    Publication date: August 28, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Hongzhong Xu, Chai Ean Gill, James D. Whitfield, Jinman Yang