Patents by Inventor Jinoo Joung
Jinoo Joung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11742972Abstract: In a method of guaranteeing a jitter upper bound for a network without time-synchronization, which guarantees a jitter upper bound for a flow that is transmitted from a source to a destination through a network, the network guarantees a latency upper bound of the flow, a buffer located between the network and the destination holds a packet of the flow for a predetermined buffer holding interval and then outputs, and the jitter upper bound is set to an arbitrary value including 0 (zero).Type: GrantFiled: April 21, 2021Date of Patent: August 29, 2023Assignee: Sangmyung University Industry-Academy Cooperation FoundationInventor: Jinoo Joung
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Patent number: 11621922Abstract: The present disclosure provides a system for network delay guarantee based on flow aggregates and interleaved regulators according to an embodiment of the present disclosure includes: at least one unit network configured to guarantee first-in-first-out (FIFO) for flow aggregates; and at least one interleaved regulator per flow aggregate located at input port or an output port of the at least one unit network, wherein among flows passing through the unit network, flows having the same network input port and the same network output port are aggregated into a single flow aggregate.Type: GrantFiled: March 17, 2020Date of Patent: April 4, 2023Assignee: Sangmyung University Industry-Academy Cooperation FoundationInventor: Jinoo Joung
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Publication number: 20220247504Abstract: In a method of guaranteeing a jitter upper bound for a network without time-synchronization, which guarantees a jitter upper bound for a flow that is transmitted from a source to a destination through a network, the network guarantees a latency upper bound of the flow, a buffer located between the network and the destination holds a packet of the flow for a predetermined buffer holding interval and then outputs, and the jitter upper bound is set to an arbitrary value including 0 (zero).Type: ApplicationFiled: April 21, 2021Publication date: August 4, 2022Inventor: Jinoo Joung
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Publication number: 20210203611Abstract: The present disclosure provides a system for network delay guarantee based on flow aggregates and interleaved regulators according to an embodiment of the present disclosure includes: at least one unit network configured to guarantee first-in-first-out (FIFO) for flow aggregates; and at least one interleaved regulator per flow aggregate located at input port or an output port of the at least one unit network, wherein among flows passing through the unit network, flows having the same network input port and the same network output port are aggregated into a single flow aggregate.Type: ApplicationFiled: March 17, 2020Publication date: July 1, 2021Inventor: Jinoo Joung
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Publication number: 20200213243Abstract: The present disclosure provides a regulating scheduler of a relaying node provided at an output port of the relaying node, wherein the scheduler performs scheduling by generating a virtual packet in a queue in which traffic is stored, to allow the queue to be continuously served more than actually incoming traffic and prevent burst from increasing due to an arbitrary queue being served all at once, and the served virtual packet is not outputted to the output port, so that the scheduler has non-working-conserving characteristics.Type: ApplicationFiled: March 19, 2019Publication date: July 2, 2020Inventor: Jinoo Joung
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Publication number: 20140105021Abstract: Disclosed are an apparatus and method for estimating network maximum delay. The method of estimating network maximum delay may include: estimating first maximum delay using a first parameter caused from a flow and a second parameter caused from a network; estimating second maximum delay using a probability distribution based on packet delay information about the flow admitted to the network; and estimating a mixed maximum delay by mixing the first maximum delay and the second maximum delay.Type: ApplicationFiled: October 7, 2013Publication date: April 17, 2014Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jeong-Yun KIM, Jinoo JOUNG
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Publication number: 20140108738Abstract: An apparatus and method for detecting a large flow are provided. The method includes: storing flow information corresponding to the received flow in a cache entry; determining whether or not there is a possibility to be determined that the flow corresponding to the flow information stored in an entry to be deleted from a cache by storing the flow information in the cache entry is a large flow; restoring the entry to be deleted in the cache according to a result of the possibility determination; inspecting a packet count of the entry in which the flow information is stored; and determining that the flow corresponding to the flow information stored in the corresponding entry is the large flow, if the result of the packet count inspection is greater than or equal to a preset threshold value.Type: ApplicationFiled: September 30, 2013Publication date: April 17, 2014Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jeong-Yun KIM, Jinoo JOUNG
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Publication number: 20110022720Abstract: A managing device according to the present invention is a management device of a network controllable by a flow aggregate (FA), and it includes a parameter information receiver for receiving control information on the FA from an upper node, a parameter generator for receiving an FA parameter according to the control information, and a parameter transmitter for transmitting the FA parameter generated by the parameter generator to another node.Type: ApplicationFiled: May 10, 2010Publication date: January 27, 2011Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY ACADEMIC COOPERATION FOUNDATION, SANGMYUNG UNIVERSITYInventors: Jongtae SONG, Young Boo KIM, Jinoo JOUNG
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Patent number: 7415020Abstract: A packet classification apparatus and method using field level tries includes a main processing part for generating and maintaining the field level tries, which organize a multi-field packet by field in a hierarchical structure for classifications; and classification engines, each of which is provided with a first classification part for performing queries and updates and processing a prefix lookup represented by an IP source/destination address lookup, and a second classification part for proceeding with classifications by corresponding field based on a result of the first classification part in order to process a range lookup belonging to the result. Accordingly, tries in the unit of a field are developed so that packet classifications for high-speed networking with excellent query performance are secured, and wherein approximately a half-million classifier rules can be processed.Type: GrantFiled: February 27, 2004Date of Patent: August 19, 2008Assignees: Samsung Electronics Co., Ltd., Polytechnic UniversityInventors: Jinoo Joung, Woo-jong Park, Guansong Zhang, H. Jonathan Chao
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Publication number: 20050105556Abstract: A packet processor which extracts a packet header field, word-aligns the extracted packet header field, and stores the aligned data in an external memory, for a main processor which processes packets received through a packet communication network. The packet processor includes: a serial-to-parallel converter for converting a packet in a bit stream, which is received via the packet communication network, into a word data, the word data being in a word unit(s) which includes at least one byte; a queue for temporarily storing the converted word data; and a computation part for selecting, among the word data stored in the queue, a word data that corresponds to the packet header, performing bit operations with the selected word data to extract a field therefrom, and expanding the extracted field into word alignment and providing it to the main processor.Type: ApplicationFiled: November 16, 2004Publication date: May 19, 2005Applicant: Samsung Electronics Co., Ltd.Inventors: Jinoo Joung, In-cheol Park
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Publication number: 20040170170Abstract: A packet classification apparatus and method using field level tries includes a main processing part for generating and maintaining the field level tries, which organize a multi-field packet by field in a hierarchical structure for classifications; and classification engines, each of which is provided with a first classification part for performing queries and updates and processing a prefix lookup represented by an IP source/destination address lookup, and a second classification part for proceeding with classifications by corresponding field based on a result of the first classification part in order to process a range lookup belonging to the result. Accordingly, tries in the unit of a field are developed so that packet classifications for high-speed networking with excellent query performance are secured, and wherein approximately a half-million classifier rules can be processed.Type: ApplicationFiled: February 27, 2004Publication date: September 2, 2004Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jinoo Joung, Woo-jong Park, Guansong Zhang, H. Jonathan Chao
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Patent number: 6754222Abstract: Disclosed is a packet switching apparatus in a data network including a plurality of ports for taking charge of an input/output of packet transmission/reception commands and data packets, a plurality of transmission/reception control sections for accessing information resources classified into groups in response to the packet transmission/reception commands, and storing the corresponding data packets in a packet memory or transmitting the corresponding data packets stored in the packet memory to the corresponding ports, a plurality of the information resources for storing in groups information required for packet switching, and providing the information stored therein to the transmission/reception control sections, and a plurality of information resource schedulers, connected to the respective information resources, for scheduling accesses of the transmission/reception control sections.Type: GrantFiled: June 12, 2000Date of Patent: June 22, 2004Assignee: Samsung Electronic Co., Ltd.Inventors: Jinoo Joung, Kyung-Il Woo, Ki-Jong Doh
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Patent number: 6628613Abstract: A flow control method in an Ethernet switch being a downstream device using a full duplex mode in a packet switched network of the type having a plurality of input ports connected to a plurality of Ethernet switches being upstream devices and a common memory for storing packet data received from each input port and for transmitting packet data read from the common memory to a destination upstream device. In such flow control method, the buffer state of the common memory is first determined. If the buffer state is buffer-full, a pause frame including a predetermined pause time is transmitted to the plurality of Ethernet switches being upstream devices and an expected pause time of the upstream devices is counted. The buffer state of the common memory is determined again if the expected pause time expires.Type: GrantFiled: October 12, 1999Date of Patent: September 30, 2003Assignee: Samsung Electronics Co. LTDInventors: Jinoo Joung, Young-Il Kim