Patents by Inventor Jinshan SHI
Jinshan SHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240194599Abstract: A semiconductor device having cells is provided, with each cell including a gate. The device includes a gate pad, a gate busbar and gate lines. The busbar connects the gate pad to the gate lines, the gate lines connect the gate busbar to the gates of the cells, and each of the gate lines is disposed along a first axis. The gate busbar includes first portions each disposed along a second axis, and the second axis intersects with the first axis. The first portions are spaced apart from each other to divide the semiconductor device into emitter segments. Lengths of the emitter segments along the first axis changes with distances of the segments from the gate pad, so that gate signals arriving at the gates of the cells from the gate pad via the gate busbar and the gate lines are substantially consistent.Type: ApplicationFiled: December 8, 2023Publication date: June 13, 2024Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.Inventors: Huiling Zuo, Chunlin Zhu, Mark Gajda, Ke Jiang, Xukun Zhang, Junli Xiang, Jinshan Shi, Yuan Fang
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Publication number: 20240194600Abstract: A semiconductor device having cells is provided, with each cell including a gate. The device includes a gate pad, a gate busbar and gate lines. The busbar connects the gate pad to the gate lines, the gate lines connect the gate busbar to the gates of the cells, and each of the gate lines is disposed along a first axis. The gate busbar includes first portions each disposed along a second axis, and the second axis intersects with the first axis. The first portions are spaced apart from each other to divide the semiconductor device into emitter segments. Lengths of the emitter segments along the first axis changes with distances of the segments from the gate pad, so that gate signals arriving at the gates of the cells from the gate pad via the gate busbar and the gate lines are substantially consistent.Type: ApplicationFiled: December 8, 2023Publication date: June 13, 2024Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.Inventors: Huiling Zuo, Chunlin Zhu, Mark Gajda, Ke Jiang, Xukun Zhang, Junli Xiang, Jinshan Shi, Yuan Fang
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Publication number: 20230420558Abstract: A semiconductor device and a manufacturing method thereof is provided. The device includes a semiconductor layer having a first and second surface opposing each other; a trench gate in the semiconductor layer, extends in a first direction parallel to the first and second surface, and from the first surface to an interior of the layer, and has a gate open end distant from the second surface; a source region of a first conductivity type and a channel region of a second conductivity type, orthographic projections of the source region and the channel region on the second surface at least partially overlap with each other in a depth direction of the trench gate, the source region having a source open end distant from the second surface, and the farther the source open end is from the second surface, the smaller a width of the source open end in the second direction.Type: ApplicationFiled: June 23, 2023Publication date: December 28, 2023Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.Inventors: Xukun Zhang, Chunlin Zhu, Ke Jiang, Huiling Zuo, Junli Xiang, Jinshan Shi, Yuan Fang
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Publication number: 20230361172Abstract: A semiconductor device and a method for manufacturing the same is provided. The semiconductor device includes: a semiconductor body having a first surface and a second surface, the semiconductor body includes: a depletion region, a drift region having a first conductivity type, an island region having the first conductivity type, a buffer region having the first conductivity type, the drift region is more proximal to the first surface of the semiconductor body than the buffer region, the depletion region is located within the drift region, and the island region is located within the drift region, an ion concentration of the first conductivity type of the island region is higher than an ion concentration of the first conductivity type of the drift region.Type: ApplicationFiled: May 2, 2023Publication date: November 9, 2023Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.Inventors: Chunlin Zhu, Ke Jiang, Junli Xiang, Huiling Zuo, Xukun Zhang, Jinshan Shi, Yuan Fang
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Patent number: 11610853Abstract: The present disclosure provides a semiconductor chip including a functional area, a first end, a second end, a third end, and a connecting portion. The functional area has first and second sides opposite to each other. The first end is disposed on the first side and the third end is disposed on the first side, wherein the semiconductor chip is switched on or off according to the drive signal received between the third end and the first end, and the connecting portion is disposed on the first side of the functional area and connected to the first end and the third end, wherein when the temperature rises above the a first temperature, the connecting portion is in a conductive state, and when the temperature drops to be not higher than a third temperature, the connecting portion is in an insulated state.Type: GrantFiled: June 28, 2022Date of Patent: March 21, 2023Assignee: Delta Electronics (Shanghai) CO., LTDInventors: Shouyu Hong, Shili Wu, Ganyu Zhou, Yuan Gao, Jinshan Shi, Jianhong Zeng
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Publication number: 20220328430Abstract: The present disclosure provides a semiconductor chip including a functional area, a first end, a second end, a third end, and a connecting portion. The functional area has first and second sides opposite to each other. The first end is disposed on the first side and the third end is disposed on the first side, wherein the semiconductor chip is switched on or off according to the drive signal received between the third end and the first end, and the connecting portion is disposed on the first side of the functional area and connected to the first end and the third end, wherein when the temperature rises above the a first temperature, the connecting portion is in a conductive state, and when the temperature drops to be not higher than a third temperature, the connecting portion is in an insulated state.Type: ApplicationFiled: June 28, 2022Publication date: October 13, 2022Applicant: Delta Electronics (Shanghai) CO., LTDInventors: Shouyu HONG, Shili WU, Ganyu ZHOU, Yuan GAO, Jinshan SHI, Jianhong ZENG
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Patent number: 11404387Abstract: The present disclosure provides a semiconductor chip including a functional area, a first end, a second end, a third end, and a connecting portion. The functional area has first and second sides opposite to each other. The first end is disposed on the first side and the third end is disposed on the first side, wherein the semiconductor chip is switched on or off according to the drive signal received between the third end and the first end, and the connecting portion is disposed on the first side of the functional area and connected to the first end and the third end, wherein when the temperature rises above the a first temperature, the connecting portion is in a conductive state, and when the temperature drops to be not higher than a third temperature, the connecting portion is in an insulated state.Type: GrantFiled: March 12, 2020Date of Patent: August 2, 2022Assignee: Delta Electronics (Shanghai) CO., LTDInventors: Shouyu Hong, Shili Wu, Ganyu Zhou, Yuan Gao, Jinshan Shi, Jianhong Zeng
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Publication number: 20200312792Abstract: The present disclosure provides a semiconductor chip including a functional area, a first end, a second end, a third end, and a connecting portion. The functional area has first and second sides opposite to each other. The first end is disposed on the first side and the third end is disposed on the first side, wherein the semiconductor chip is switched on or off according to the drive signal received between the third end and the first end, and the connecting portion is disposed on the first side of the functional area and connected to the first end and the third end, wherein when the temperature rises above the a first temperature, the connecting portion is in a conductive state, and when the temperature drops to be not higher than a third temperature, the connecting portion is in an insulated state.Type: ApplicationFiled: March 12, 2020Publication date: October 1, 2020Applicant: Delta Electronics (Shanghai) CO., LTDInventors: Shouyu HONG, Shili WU, Ganyu ZHOU, Yuan GAO, Jinshan SHI, Jianhong ZENG