Abstract: A data processing method includes receiving, by a source physical machine, a first data packet including first data, and a destination address of the first data is a first virtual machine, generating a second data packet including the first data and an identifier of a second virtual machine, where the second virtual machine is the first virtual machine after being live migrated from the source physical machine to a destination physical machine, and the identifier of the second virtual machine identifies the second virtual machine on the destination physical machine, and sending, by the source physical machine, the second data packet to the destination physical machine.

Abstract: A semiconductor component and a method for manufacturing the semiconductor component that are suitable for use with low temperature processing. A semiconductor substrate is provided and an optional layer of silicon nitride is formed on the semiconductor substrate using Atomic Layer Deposition (ALD). A layer of dielectric material is formed on the silicon nitride layer using Sub-Atmospheric Chemical Vapor Deposition (SACVD) at a temperature below about 450° C. When the optional layer of silicon nitride is not present, the SACVD dielectric material is formed on the semiconductor substrate. A contact hole having sidewalls is formed through the SACVD dielectric layer, through the silicon nitride layer, and exposes a portion of the semiconductor substrate. A layer of tungsten nitride is formed on the exposed portion of the semiconductor substrate and along the sidewalls of the contact hole. Tungsten is formed on the layer of tungsten nitride.

Abstract: A method of forming a contact in a semiconductor device provides a titanium contact layer in a contact hole and a MOCVD-TiN barrier metal layer on the titanium contact layer. Impurities are removed from the MOCVD-TiN barrier metal layer by a plasma treatment in a nitrogen-hydrogen plasma. The time period for plasma treating the titanium nitride layer is controlled so that penetration of nitrogen into the underlying titanium contact layer is substantially prevented, preserving the titanium contact layer for subsequently forming a titanium silicide at the bottom of the contact.

Abstract: A method of forming a contact through a material includes forming a via through a dielectric material and cleaning the via using a dilute hydrofluoric (DHF) acid solution. The method further includes depositing a barrier layer within the via and depositing metal adjacent the barrier layer.

Abstract: A semiconductor component having a titanium silicide contact structure and a method for manufacturing the semiconductor component. A layer of dielectric material is formed over a semiconductor substrate. An opening having sidewalls is formed in the dielectric layer and exposes a portion of the semiconductor substrate. Titanium silicide is disposed on the dielectric layer, sidewalls, and the exposed portion of the semiconductor substrate. The titanium silicide may be formed by disposing titanium on the dielectric layer, sidewalls, and exposed portion of the semiconductor substrate and reacting the titanium with silane. Alternatively, the titanium silicide may be sputter deposited. A layer of titanium nitride is formed on the titanium silicide. A layer of tungsten is formed on the titanium nitride. The tungsten, titanium nitride, and titanium silicide are polished to form the contact structures.

Abstract: A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. An absorption layer is formed on the first layer of dielectric material. The absorption layer includes a plurality of titanium atoms bonded to the first layer of dielectric material, a nitrogen atom bonded to each titanium atom, and at least one ligand bonded to the nitrogen atom. The at least one ligand is removed from the nitrogen atoms to form nucleation centers. A metal such as tungsten is bonded to the nucleation centers to form metallic islands. A dielectric material is formed on the nucleation centers and annealed to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.

Abstract: A method for manufacturing a semiconductor component that inhibits formation of wormholes in a semiconductor substrate. A contact opening is formed in a dielectric layer disposed on a semiconductor substrate. The contact opening exposes a portion of the semiconductor substrate. A sacrificial layer of oxide is formed on the exposed portion of the semiconductor substrate and along the sidewalls of the contact opening. Silane is reacted with tungsten hexafluoride to form a hydrofluoric acid vapor and tungsten. The hydrofluoric acid vapor etches away the sacrificial oxide layer and a thin layer of tungsten is formed on the exposed portion of the semiconductor substrate. After forming the thin layer of tungsten, the reactants may be changed to more quickly fill the contact opening with tungsten.

Abstract: A method for forming a semiconductor structure having a metal gate with a controlled work function includes the step of forming a precursor having a substrate with active regions separated by a channel, a temporary gate over the channel and within a dielectric layer. The temporary gate is removed to form a recess with a bottom and sidewalls in the dielectric layer. A non-silicon containing metal layer is deposited in the recess. Silicon is incorporated into the metal layer and a metal is deposited on the metal layer. The incorporation of the silicon is achieved by silane treatments that are performed before, after or both before and after the depositing of the metal layer. The amount of silicon incorporated into the metal layer controls the work function of the metal gate that is formed.

Abstract: Microminiaturized semiconductor devices are fabricated with a replacement metal gate and a high-k tantalum oxide or tantalum oxynitride gate dielectric with significantly reduced carbon. Embodiments include forming an opening in a dielectric layer by removing a removable gate, depositing a thin tantalum film, as by PVD at a thickness of 25 ? to 60 ? lining the opening, and then conducting thermal oxidation, as at a temperature of 100° C. to 500° C., in flowing oxygen or ozone to form a high-k tantalum oxide gate dielectric layer, or in oxygen and N2O or ozone and N2O ammonia to form a high-k tantalum oxynitride gate dielectric. Alternatively, oxidation can be conducted in an oxygen or ozone plasma to form the high-k tantalum oxide layer, or in a plasma containing N2O and oxygen or ozone to form the high-k tantalum oxynitride gate dielectric layer.

Abstract: A metal gate electrode is formed with an intrinsic electric field to modify its work function and the threshold voltage of the transistor. Embodiments include forming an opening in a dielectric layer by removing a removable gate, depositing one or more layers of tantalum nitride such that the nitrogen content increases from the bottom of the layer adjacent the gate dielectric layer upwardly. Other embodiments include forming the intrinsic electric field to control the work function by doping one or more metal layers and forming metal alloys. Embodiments further include the use of barrier layers when forming metal gate electrodes.

Abstract: A method of forming a contact in a semiconductor device deposits a refractory metal contact layer in a contact hole on a conductive region portion in a silicon substrate. The refractory metal contact layer is reacted with the silicide region prior to a plasma treatment of a contact barrier metal layer formed within the contact hole. This prevents portions of the refractory metal contact layer from being nitridated prior to conversion to silicide.

Abstract: A method for forming a semiconductor structure removes the temporary gate formed on the dielectric layer to expose a recess in which oxygen-rich CVD oxide is deposited. A tantalum layer is then deposited by low-power physical vapor deposition on the CVD oxide. Annealing is then performed to create a Ta2O5 region and a Ta region from the deposited oxide and Ta. This creates a low carbon-content Ta2O5 and a metallic Ta gate in a single process step.

Abstract: Micro-miniaturized semiconductor devices are fabricated with silicon-rich tantalum silicon nitride replacement metal gate electrodes. Embodiments include removing a removable gate, depositing a layer of tantalum nitride, as by PVD at a thickness of 25 ? to 75 ?, and then introducing silicon into the deposited tantalum nitride layer by thermal soaking in silane or silane plasma treatment to form a layer of silicon-rich tantalum silicon nitride. In another embodiment, the intermediate structure is subjected to thermal soaking in silane or silane plasma treatment before and after depositing the tantalum nitride layer. Embodiments further include pretreating the intermediate structure with silane prior to depositing the tantalum nitride layer, treating the deposited tantalum nitride layer with silane, and repeating these steps a number of times to form a plurality of sub-layers of silicon-rich tantalum silicon nitride.

Abstract: Gate dielectric degradation due to plasma damage during replacement metal gate processing is cured and prevented from further plasma degradation by treatment of the gate dielectric after removing the polysilicon gate. Embodiments include low temperature vacuum annealing after metal deposition and CMP, annealing in oxygen and argon, ozone or a forming gas before metal deposition, or heat soaking in silane or disilane, before metal deposition.

Abstract: A method for forming a semiconductor structure having a metal gate with a controlled work function includes the step of forming a precursor having a substrate with active regions separated by a channel, a temporary gate over the channel and within a dielectric layer. The temporary gate is removed to form a recess with a bottom and sidewalls in the dielectric layer. A non-silicon containing metal layer is deposited in the recess. Silicon is incorporated into the metal layer and a metal is deposited on the metal layer. The incorporation of the silicon is achieved by silane treatments that are performed before, after or both before and after the depositing of the metal layer. The amount of silicon incorporated into the metal layer controls the work function of the metal gate that is formed.

Abstract: A metal gate electrode is formed with an intrinsic electric field to modify its work function and the threshold voltage of the transistor. Embodiments include forming an opening in a dielectric layer by removing a removable gate, depositing one or more layers of tantalum nitride such that the nitrogen content increases from the bottom of the layer adjacent the gate dielectric layer upwardly. Other embodiments include forming the intrinsic electric field to control the work function by doping one or more metal layers and forming metal alloys. Embodiments further include the use of barrier layers when forming metal gate electrodes.

Abstract: A metal gate electrode is formed with an intrinsic electric field to modify its work function and the threshold voltage of the transistor. Embodiments include forming an opening in a dielectric layer by removing a removable gate, depositing one or more layers of tantalum nitride such that the nitrogen content increases from the bottom of the layer adjacent the gate dielectric layer upwardly. Other embodiments include forming the intrinsic electric field to control the work function by doping one or more metal layers and forming metal alloys. Embodiments further include the use of barrier layers when forming metal gate electrodes.