Patents by Inventor Jin-Soo Lim

Jin-Soo Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250039410
    Abstract: Provided is a transform coefficient scan method including: determining a reference transform block for a decoding target block; deriving a scanning map of the decoding target block using scanning information of the reference transform block; and performing inverse scanning on a transform coefficient of the decoding target block using the derived scanning map. According to the present invention, picture encoding/decoding efficiency may be improved.
    Type: Application
    Filed: October 17, 2024
    Publication date: January 30, 2025
    Inventors: Sung Chang LIM, Hui Yong KIM, Se Yoon JEONG, Jong Ho KIM, Ha Hyun LEE, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM
  • Publication number: 20250039406
    Abstract: An intra prediction method according to the present invention comprises the following steps: performing a directional prediction using at least one of a neighboring pixel of a current block and a left upper corner pixel positioned at a left upper corner of the current block so as to obtain a first prediction value for the current block; obtaining a second prediction value for the current block using the reference sample positioned in the current block; and weighted summing the first prediction value and the second prediction value using a weighting matrix so as to obtain a final prediction value for the current block. According to the present invention, image encoding/decoding efficiency may be improved.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jin Ho LEE, Hui Yong KIM, Sung Chang LIM, Jong Ho KIM, Ha Hyun LEE, Se Yoon JEONG, Suk Hee CHO, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN
  • Publication number: 20250039422
    Abstract: An inter prediction method according to the present invention comprises the steps of: selecting candidate units from among reconstructed neighbor units; creating a candidate unit set with respect to units to be decoded, using the selected candidate units; determining a reference unit from among the candidate units which constitute the created candidate unit set; and performing inter prediction on the units to be decoded, using the determined reference unit. According to the present invention, image encoding/decoding efficiency can be improved.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang LIM, Hui Yong KIM, Se Yoon JEONG, Suk Hee CHO, Jong Ho KIM, Ha Hyun LEE, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN
  • Patent number: 12212742
    Abstract: The present invention relates to an intra prediction method and apparatus. The image decoding method according to the present invention may comprise decoding information on intra prediction; and generating a prediction block by performing intra prediction for a current block based on the information on intra prediction. The information on intra prediction may include information on an intra prediction mode, and the intra prediction mode may include a curved intra prediction mode.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: January 28, 2025
    Assignee: LX Semicon Co., Ltd.
    Inventors: Hyun Suk Ko, Jin Ho Lee, Sung Chang Lim, Jung Won Kang, Ha Hyun Lee, Dong San Jun, Seung Hyun Cho, Hui Yong Kim, Jin Soo Choi
  • Patent number: 12212739
    Abstract: Provided are an image encoding method and device. When carrying out image encoding for a block within a slice, at least one block in a restored block of the slice is set as a reference block. When this is done, the encoding parameters of the reference block are distinguished, and the block to be encoded is encoded adaptively based on the encoding parameters.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: January 28, 2025
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jong Ho Kim, Hae Chul Choi, Hui Yong Kim, Ha Hyun Lee, Jin Ho Lee, Se Yoon Jeong, Suk Hee Cho, Jin Soo Choi, Jin Woo Hong, Jin Woong Kim
  • Patent number: 12212740
    Abstract: The present invention relates to a method and apparatus for setting a reference picture index of a temporal merging candidate. An inter-picture prediction method using a temporal merging candidate can include the steps of: determining a reference picture index for a current block; and inducing a temporal merging candidate block of the current block and calculating a temporal merging candidate from the temporal merging candidate block, wherein the reference picture index of the temporal merging candidate can be calculated regardless of whether a block other than the current block is decoded. Accordingly, a video processing speed can be increased and video processing complexity can be reduced.
    Type: Grant
    Filed: October 31, 2023
    Date of Patent: January 28, 2025
    Assignees: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hui Yong Kim, Gwang Hoon Park, Kyung Yong Kim, Sang Min Kim, Sung Chang Lim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
  • Patent number: 12212741
    Abstract: The present invention relates to a method and apparatus for setting a reference picture index of a temporal merging candidate. An inter-picture prediction method using a temporal merging candidate can include the steps of: determining a reference picture index for a current block; and inducing a temporal merging candidate block of the current block and calculating a temporal merging candidate from the temporal merging candidate block, wherein the reference picture index of the temporal merging candidate can be calculated regardless of whether a block other than the current block is decoded. Accordingly, a video processing speed can be increased and video processing complexity can be reduced.
    Type: Grant
    Filed: October 31, 2023
    Date of Patent: January 28, 2025
    Assignees: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hui Yong Kim, Gwang Hoon Park, Kyung Yong Kim, Sang Min Kim, Sung Chang Lim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
  • Publication number: 20250030844
    Abstract: An image encoding/decoding method and apparatus for predicting a second color component block using a first color component block are provided. An image decoding method of the present invention comprises deriving a prediction parameter using the first color component block, and predicting the second color component block using the derived prediction parameter.
    Type: Application
    Filed: October 8, 2024
    Publication date: January 23, 2025
    Inventors: Jin Ho LEE, Hyun Suk KO, Jung Won KANG, Sung Chang LIM, Ha Hyun LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Publication number: 20250030849
    Abstract: The present invention relates to an intra prediction method and apparatus. The image decoding method according to the present invention may comprise decoding information on intra prediction; and generating a prediction block by performing intra prediction for a current block based on the information on intra prediction. The information on intra prediction may include information on an intra prediction mode, and the intra prediction mode may include a curved intra prediction mode.
    Type: Application
    Filed: October 8, 2024
    Publication date: January 23, 2025
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Patent number: 12206887
    Abstract: An image decoding method according to the present invention includes reconstructing a residual block by inverse-quantizing and inverse-transforming an entropy-decoded residual block, generating a prediction block by performing intra prediction on a current block, and reconstructing an picture by adding the reconstructed residual block to the prediction block, wherein generating the prediction block includes generating a final prediction value of a prediction target pixel included in the current block based on a first prediction value of the prediction target pixel and a final correction value calculated by performing an arithmetic right shift on a two's complementary integer representation for an initial correction value of the prediction target pixel by a binary digit of 1. Accordingly, upon image encoding/decoding, computation complexity may be reduced.
    Type: Grant
    Filed: April 30, 2024
    Date of Patent: January 21, 2025
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hui Yong Kim, Jin Ho Lee, Sung Chang Lim, Jin Soo Choi, Jin Woong Kim
  • Patent number: 12206843
    Abstract: Provided are an image encoding method and device. When carrying out image encoding for a block within a slice, at least one block in a restored block of the slice is set as a reference block. When this is done, the encoding parameters of the reference block are distinguished, and the block to be encoded is encoded adaptively based on the encoding parameters.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: January 21, 2025
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jong Ho Kim, Hae Chul Choi, Hui Yong Kim, Ha Hyun Lee, Jin Ho Lee, Se Yoon Jeong, Suk Hee Cho, Jin Soo Choi, Jin Woo Hong, Jin Woong Kim
  • Publication number: 20250024073
    Abstract: Provided is a method for performing intra-prediction, using an adaptive filter. The method for performing intra-prediction includes the steps of: determining whether or not to apply a first filter for a reference pixel value on the basis of information of a neighboring block of a current block; applying the first filter for the reference pixel value when it is determined to apply to the first filter; performing intra-prediction on the current block on the basis of the reference pixel value; determining whether or not to apply a second filter for a prediction value according to each prediction mode of the current block, which is predicted by the intra-prediction performance on the basis of the information of the neighboring blocks; and applying the second filter for the prediction value according to each prediction mode of the current block when it is determined to apply to the second filter.
    Type: Application
    Filed: July 26, 2024
    Publication date: January 16, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jin Ho LEE, Hui Yong KIM, Se Yoon JEONG, Suk Hee CHO, Ha Hyun LEE, Jong Ho KIM, Sung Chang LIM, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN
  • Patent number: 11895219
    Abstract: An artificial intelligence calculation semiconductor device is provided. The artificial intelligence calculation semiconductor device comprising: a control unit; and a MAC (Multiply and Accumulator) calculator which executes a homomorphic encryption calculation through the control unit, wherein the MAC calculator includes an NTT (Numeric Theoretic Transform)/INTT (Inverse NTT) circuit which generates cipher texts by performing a homomorphic multiplication calculation through transformation or inverse transformation of data, a cipher text multiplier which executes a multiplication calculation between the cipher texts, a cipher text adder/subtractor which executes addition and/or subtraction calculations between the cipher texts, and a rotator which performs a cyclic shift of a slot of the cipher texts.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: February 6, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Soo Lim, Chang Kyu Seol, Pil Sang Yoon, Ji Youp Kim, Ju-Young Jung
  • Patent number: 11836606
    Abstract: A storage device is provided including an interface circuit configured to receive application information from a host; a field programmable gate array (FPGA); a neural processing unit (NPU); and a central processing unit (CPU) configured to select a hardware image from among a plurality of hardware images stored in a memory using the application information, and reconfigure the FPGA using the selected hardware image. The NPU is configured to perform an operation using the reconfigured FPGA.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: December 5, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Soo Lim, Chang Kyu Seol, Jae Hun Jang, Hye Jeong So, Hong Rak Son, Pil Sang Yoon
  • Publication number: 20230010192
    Abstract: A non-volatile memory device and a non-volatile memory system comprising the same are provided. The non-volatile memory device includes a first stack in which a first conductive pattern and a first dielectric layer are alternately stacked in a first direction on a substrate, a second stack in which a second conductive pattern and a second dielectric layer are alternately stacked in the first direction on the first stack opposite the substrate, a first monitoring channel structure that penetrates the first stack in the first direction, and a second monitoring channel structure that penetrates the second stack in the first direction and is =on the first monitoring channel structure. A width of a top of the first monitoring channel structure opposite the substrate is smaller than a width of a bottom of the second monitoring channel structure adjacent the top of the first monitoring channel structure.
    Type: Application
    Filed: March 23, 2022
    Publication date: January 12, 2023
    Inventors: Jung-Hwan Lee, Jin-Soo Lim
  • Publication number: 20210376997
    Abstract: An artificial intelligence calculation semiconductor device is provided. The artificial intelligence calculation semiconductor device comprising: a control unit; and a MAC (Multiply and Accumulator) calculator which executes a homomorphic encryption calculation through the control unit, wherein the MAC calculator includes an NTT (Numeric Theoretic Transform)/INTT (Inverse NTT) circuit which generates cipher texts by performing a homomorphic multiplication calculation through transformation or inverse transformation of data, a cipher text multiplier which executes a multiplication calculation between the cipher texts, a cipher text adder/subtractor which executes addition and/or subtraction calculations between the cipher texts, and a rotator which performs a cyclic shift of a slot of the cipher texts.
    Type: Application
    Filed: December 29, 2020
    Publication date: December 2, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin Soo LIM, Chang Kyu SEOL, Pil Sang YOON, Ji Youp KIM, Ju-Young JUNG
  • Patent number: 11153037
    Abstract: Disclosed is a method and apparatus for encoding an erasure code for storing data. The disclosed method for encoding an erasure code comprises the steps of: (a) generating a first local parity group including two or more local parity nodes for data nodes; (b) generating at least one global parity node for the data nodes; (c) generating at least one second local parity group including two or more local parity nodes for the data nodes; and (d) storing the data nodes, the first local parity group, the second local parity group, and the global parity node. According to the disclosed method, it is possible to store and recover data safely and efficiently.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: October 19, 2021
    Assignee: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Dong-Joon Shin, Ji Ho Kim, Jin Soo Lim
  • Publication number: 20210133543
    Abstract: A storage device is provided including an interface circuit configured to receive application information from a host; a field programmable gate array (FPGA); a neural processing unit (NPU); and a central processing unit (CPU) configured to select a hardware image from among a plurality of hardware images stored in a memory using the application information, and reconfigure the FPGA using the selected hardware image. The NPU is configured to perform an operation using the reconfigured FPGA.
    Type: Application
    Filed: January 31, 2020
    Publication date: May 6, 2021
    Inventors: JIN SOO LIM, CHANG KYU SEOL, JAE HUN JANG, HYE JEONG SO, HONG RAK SON, PIL SANG YOON
  • Publication number: 20210091789
    Abstract: Disclosed is a method and apparatus for encoding an erasure code for storing data. The disclosed method for encoding an erasure code comprises the steps of: (a) generating a first local parity group including two or more local parity nodes for data nodes; (b) generating at least one global parity node for the data nodes; (c) generating at least one second local parity group including two or more local parity nodes for the data nodes; and (d) storing the data nodes, the first local parity group, the second local parity group, and the global parity node. According to the disclosed method, it is possible to store and recover data safely and efficiently.
    Type: Application
    Filed: July 25, 2018
    Publication date: March 25, 2021
    Inventors: Dong-Joon SHIN, Ji Ho KIM, Jin Soo LIM
  • Patent number: RE50089
    Abstract: Three-dimensional semiconductor devices are provided. The three-dimensional semiconductor device includes a substrate, a buffer layer on the substrate. The buffer layer includes a material having an etching selectivity relative to that of the substrate. A multi-layer stack including alternating insulation patterns and conductive patterns is provided on the buffer layer opposite the substrate. One or more active patterns respectively extend through the alternating insulation patterns and conductive patterns of the multi-layer stack and into the buffer layer. Related fabrication methods are also discussed.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: August 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Il Chang, Changhyun Lee, Byoungkeun Son, Jin-Soo Lim