Patents by Inventor Jin-Tae Kang
Jin-Tae Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136488Abstract: A pixel may include: an emission area and a non-emission area; a first bank in the non-emission area, the first bank including an opening corresponding to the emission area; a first electrode, a second electrode, and an intermediate electrode that are spaced from each other; light emitting elements in the emission area, each of the light emitting elements including one end portion electrically connected to one of the first electrode, the second electrode, or the intermediate electrode and an other end portion electrically connected to another one of the first electrode, the second electrode, or the intermediate electrode; and a sub-bank located in the opening of the first bank, the sub-bank being spaced from the first bank. The intermediate electrode may be around at least a portion of the sub-bank.Type: ApplicationFiled: October 16, 2023Publication date: April 25, 2024Inventors: Jin Taek KIM, Veidhes BASRUR, Ki Nyeng KANG, Ock Soo SON, Yong Tae CHO, Jong Hwan CHA
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Patent number: 11961775Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: November 8, 2022Date of Patent: April 16, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Patent number: 11955124Abstract: An example electronic device includes a housing; a touchscreen display; a microphone; at least one speaker; a button disposed on a portion of the housing or set to be displayed on the touchscreen display; a wireless communication circuit; a processor; and a memory. When a user interface is not displayed on the touchscreen display, the electronic device enables a user to receive a user input through the button, receives user speech through the microphone, and then provides data on the user speech to an external server. An instruction for performing a task is received from the server. When the user interface is displayed on the touchscreen display, the electronic device enables the user to receive the user input through the button, receives user speech through the microphone, and then provides data on the user speech to the external server.Type: GrantFiled: January 10, 2022Date of Patent: April 9, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang-Ki Kang, Jang-Seok Seo, Kook-Tae Choi, Hyun-Woo Kang, Jin-Yeol Kim, Chae-Hwan Li, Kyung-Tae Kim, Dong-Ho Jang, Min-Kyung Hwang
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Publication number: 20240113085Abstract: A display device includes electrodes in an emission area of a pixel, and spaced apart from each other, light-emitting elements respectively between the electrodes, connection electrodes above the light-emitting elements, and including a first electrode portion, a second electrode portion, and a connection portion between the first electrode portion and the second electrode portion, and a shielding electrode in a non-emission area of the pixel, and overlapping the connection portion.Type: ApplicationFiled: September 27, 2023Publication date: April 4, 2024Inventors: Jin Taek KIM, Ock Soo SON, Veidhes BASRUR, Ki Nyeng KANG, Yong Tae CHO
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Publication number: 20240092060Abstract: Provided is an unconstrained vibration damping metal sheet with foam pores. The unconstrained vibration damping metal sheet of the present invention comprises: a metal sheet; an organic-inorganic pretreatment layer containing an acrylic resin formed on the metal sheet; and a foam resin layer formed on the pretreatment layer, the foam resin layer containing, based on weight % thereof, a thermoplastic polyvinyl chloride resin: 40-80%, a plasticizer: 5-40%, a foaming agent: 0.1-10%, an oxide-based crosslinker: 1-4%, and spherical silica: 1-10%.Type: ApplicationFiled: November 30, 2021Publication date: March 21, 2024Applicant: POSCO Co., LtdInventors: Jin-Tae Kim, Dae-Gyu Kang, Yang-Ho Choi, Jung-Hwan Lee
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Publication number: 20240096903Abstract: A display device includes electrodes spaced apart from each other in a display area, an insulating layer disposed on the electrodes, light emitting elements disposed between the electrodes on the insulating layer, a signal line electrically connected to the light emitting elements, and a pad electrode electrically connected to the signal line, the pad electrode and the electrodes being disposed on a same layer in a non-display area. The insulating layer includes an opening exposing the pad electrode, and the signal line does not overlap the opening of the insulating layer in plan view.Type: ApplicationFiled: May 15, 2023Publication date: March 21, 2024Applicant: Samsung Display Co., LTD.Inventors: Veidhes BASRUR, Jin Taek KIM, Ki Nyeng KANG, Yong Tae CHO
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Publication number: 20240088340Abstract: A display device includes a substrate including a display area and a pad area, a circuit element layer on the substrate, and an alignment electrode layer on the circuit element layer, wherein the circuit element layer includes a thin film transistor in the display area, and a pad electrode in the pad area, the alignment electrode layer includes a first alignment electrode and a second alignment electrode spaced from each other in the display area, and a pad upper electrode includes a first opening exposing the pad electrode in the pad area, and a light emitting element is on a space between the first alignment electrode and the second alignment electrode that are spaced from each other.Type: ApplicationFiled: August 29, 2023Publication date: March 14, 2024Inventors: Yong Tae CHO, Ki Nyeng KANG, Veidhes BASRUR, Jin Taek KIM, Ock Soo SON
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Patent number: 11922624Abstract: An apparatus for providing brain lesion information based on an image includes a magnetic resonance angiography (MRA) provider configured to provide an environment capable of displaying 3D time-of-flight magnetic resonance angiography (3D TOF MRA) using user input, a brain lesion input unit configured to generate and manage a brain lesion image, a maximum intensity projection (MIP) converter configured to configure MIP image data including at least one image frame corresponding to a projection position of the brain lesion image, a noise remover configured to remove noise of brain lesion information and to configure corrected MIP image data, from which the noise is removed, and an MRA reconfiguration unit configured to reconfigure a corrected brain lesion image by back-projecting the corrected MIP image data.Type: GrantFiled: December 27, 2019Date of Patent: March 5, 2024Assignee: JLK INC.Inventors: Won Tae Kim, Shin Uk Kang, Myung Jae Lee, Dong Min Kim, Jin Seong Jang
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Patent number: 7777272Abstract: A non-volatile memory device which can be highly-integrated without a decrease in reliability, and a method of fabricating the same, are provided. In the non-volatile memory device, a first doped layer of a first conductivity type is disposed on a substrate. A semiconductor pillar of a second conductivity type opposite to the first conductivity type extends upward from the first doped layer. A first control gate electrode substantially surrounds a first sidewall of the semiconductor pillar. A second control gate electrode substantially surrounds a second sidewall of the semiconductor pillar and is separated from the first control gate electrode. A second doped layer of the first conductivity type is disposed on the semiconductor pillar.Type: GrantFiled: April 30, 2008Date of Patent: August 17, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-Pil Youn, Hyeong-Jun Kim, Jin-Tae Kang, Young-Jae Joo
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Patent number: 7704788Abstract: Methods of forming integrated circuit devices include forming at least one non-volatile memory cell on a substrate. The memory cell includes a plurality of phase-changeable material regions therein that are electrically coupled in series. This plurality of phase-changeable material regions are collectively configured to support at least 2-bits of data when serially programmed using at least four serial program currents. Each of the plurality of phase-changeable material regions has different electrical resistance characteristics when programmed.Type: GrantFiled: April 4, 2008Date of Patent: April 27, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-Pil Youn, Jin-Tae Kang, Young-Jae Joo, Hyeong-Jun Kim, Jae-Min Shin
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Publication number: 20080277720Abstract: A non-volatile memory device which can be highly-integrated without a decrease in reliability, and a method of fabricating the same, are provided. In the non-volatile memory device, a first doped layer of a first conductivity type is disposed on a substrate. A semiconductor pillar of a second conductivity type opposite to the first conductivity type extends upward from the first doped layer. A first control gate electrode substantially surrounds a first sidewall of the semiconductor pillar. A second control gate electrode substantially surrounds a second sidewall of the semiconductor pillar and is separated from the first control gate electrode. A second doped layer of the first conductivity type is disposed on the semiconductor pillar.Type: ApplicationFiled: April 30, 2008Publication date: November 13, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sun-Pil YOUN, Hyeong-Jun KIM, Jin-Tae KANG, Young-Jae JOO
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Publication number: 20080248632Abstract: Methods of forming integrated circuit devices include forming at least one non-volatile memory cell on a substrate. The memory cell includes a plurality of phase-changeable material regions therein that are electrically coupled in series. This plurality of phase-changeable material regions are collectively configured to support at least 2-bits of data when serially programmed using at least four serial program currents. Each of the plurality of phase-changeable material regions has different electrical resistance characteristics when programmed.Type: ApplicationFiled: April 4, 2008Publication date: October 9, 2008Inventors: Sun Pil Youn, Jin-Tae Kang, Young-Jae Joo, Hyeong-Jun Kim, Jae-Min Shin