Patents by Inventor Jin-Woo Bae

Jin-Woo Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142089
    Abstract: The lamp comprises a light source configured to emit light, a support structure that supports the light source, and an optical component designed to change the characteristics of the light emitted from the light source. The support structure is configured to rotate both the light source and the optical component about a first axis, and the light source and the optical component are designed to move linearly relative to each other along a second axis.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 2, 2024
    Inventor: Jin Woo BAE
  • Publication number: 20240132849
    Abstract: The present disclosure relates to a non-alcoholic fatty liver artificial tissue model. As compared to a conventional technology by which tissues are cultured only in Matrigel including a device composed of a decellularized liver tissue-derived extracellular matrix and a plurality of microchannels or a decellularized liver tissue-derived extracellular matrix, the present disclosure enables better mimicking of an actual non-alcoholic fatty liver disease due to the presence of Kupffer cells and hepatic stellate cells. Also, according to the present disclosure, the growth of liver organoids can be improved and fat accumulation and inflammation in the liver organoids can be caused to occur well through free fatty acid treatment, and the phenotypes of non-alcoholic fatty liver can be better expressed.
    Type: Application
    Filed: November 21, 2023
    Publication date: April 25, 2024
    Inventors: Seung Woo CHO, Su Kyeom KIM, Baofang CUI, Jin KIM, Soo Han BAE, Dai Hoon HAN
  • Patent number: 11944948
    Abstract: Disclosed is a composite for forming a coacervate interfacial film. The composite for forming the coacervate interfacial film contains a cationic hectorite nanoplate-shaped particle structure containing a hectorite nanoplate-shaped particle and a cationic surfactant coupled to a surface of the hectorite nanoplate-shaped particle, and an anionic cellulose nanofibril containing an anionic functional group in at least a portion thereof, in which the composite may form the coacervate interfacial film at an interface of an oil phase and a water phase through electrostatic interaction between the cationic surfactant and the anionic functional group.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: April 2, 2024
    Assignees: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, SUNJIN BEAUTY SCIENCE CO., LTD.
    Inventors: Jin Woong Kim, Yeong Sik Cho, Ji Woo Bae, Hye Min Seo, Kyoung Hee Shin, Sung Ho Lee
  • Patent number: 11942635
    Abstract: The present invention relates to a positive electrode active material and a lithium secondary battery using a positive electrode containing the positive electrode active material. More particularly, the present invention relates to a positive electrode active material that is able to solve a problem of increased resistance according to an increase in Ni content by forming a charge transport channel in a lithium composite oxide and a lithium secondary battery using a positive electrode containing the positive electrode active material.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: March 26, 2024
    Assignee: ECOPRO BM CO., LTD.
    Inventors: Moon Ho Choi, Jun Won Suh, Jin Kyeong Yun, Jung Han Lee, Mi Hye Yun, Seung Woo Choi, Gwang Seok Choe, Ye Ri Jang, Joong Ho Bae
  • Publication number: 20240076798
    Abstract: An ingot growth apparatus is disclosed. The ingot growth apparatus according to an embodiment of the present invention may comprise: a growth furnace having a main crucible which is disposed inside the growth furnace and in which molten silicon is held in order to grow an ingot; a susceptor formed to surround the outer surface of the main crucible and heating the main crucible; a heater formed to surround the outer surface of the susceptor and including a coil which is supplied with power to generate a magnetic field and heats the susceptor by electromagnetic induction from the magnetic field; and a heat insulation member disposed between the coil and the susceptor.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 7, 2024
    Applicants: HANWHA SOLUTIONS CORPORATION, HANWHA CORPORATION
    Inventors: Young Min LEE, Kyung Seok LEE, Jin Sung PARK, Dong Woo BAE
  • Publication number: 20230403772
    Abstract: An LED lighting system capable of performing a dimming function for adjusting brightness of output light to decrease includes: an LED light source comprising three or more LED channels that are respectively configured to emit light of different color temperatures; and an electric circuit configured to electrically drive the three or more LED channels. The electric circuit is configured to drive the three or more LED channels so that brightness and color temperature of the output light obtained by the LED light source decrease together in conjunction with each other during dimming in which the brightness of the output light decreases.
    Type: Application
    Filed: September 7, 2021
    Publication date: December 14, 2023
    Inventor: Jin Woo BAE
  • Publication number: 20230226517
    Abstract: The present invention relates to a leakage-preventing high performance desiccant composition and a preparation method therefor, wherein a solid desiccant composition includes calcium chloride (CaCl2), magnesium chloride (MgCl2), and metal oxide, wherein the metal oxide may be calcium oxide (CaO), and a gel desiccant composition includes metal chloride and an absorbent polymer, wherein the metal chloride may be calcium chloride (CaCl2) and magnesium chloride (MgCl2), and the absorbent polymer may be CMC (carboxymethyl cellulose).
    Type: Application
    Filed: November 27, 2020
    Publication date: July 20, 2023
    Applicant: KOREA UNIVERSITY OF TECHNOLOGY AND EDUCATION INDUSTRY-UNIVERSITY COOPERATION FOUNDATION
    Inventors: Byeong Uk NAM, Jin Woo BAE, Jong In LEE
  • Patent number: 11581318
    Abstract: A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: February 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye Sung Park, Jong Hyuk Park, Jin Woo Bae, Bo Un Yoon, Il Young Yoon, Bong Sik Choi
  • Publication number: 20230026612
    Abstract: An electro-responsive gel lens having automatic multifocal and image stabilization functions according to the present invention comprises: a first electrode and a second electrode formed on a substrate and having different polarities; and a transmissive part which is formed of an electroactive polymer, and the shape of which is deformed when a voltage is applied to the first electrode and the second electrode, wherein at least one of the first electrode and the second electrode is formed in the plural, and a voltage is individually applied so as to change the shape of the transmissive part in three dimensions, such that the location of the focal point of light passing through the transmissive part is changed in three dimensions.
    Type: Application
    Filed: March 25, 2020
    Publication date: January 26, 2023
    Applicant: KOREA UNIVERSITY OF TECHNOLOGY AND EDUCATION INDUSTRY-UNIVERSITY COOPERATION FOUNDATION
    Inventor: Jin Woo BAE
  • Publication number: 20220396672
    Abstract: Disclosed are an organic ion conductive polymer gel elastomer including a polymer matrix; a plasticizing solvent impregnated into the polymer matrix to plasticize the polymer matrix so that the polymer matrix is in a gel state; and an ion conductive dopant ionized by the plasticizing solvent and dispersed in the polymer matrix, wherein the plasticizing solvent and the ion conductive dopant are non-hydrophilic, and a method of preparing the organic ion conductive polymer gel elastomer.
    Type: Application
    Filed: September 1, 2020
    Publication date: December 15, 2022
    Inventors: Jin Woo BAE, Chang Soo HAN, Kyoung Yong CHUN, Young Jun SON
  • Publication number: 20210242215
    Abstract: A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.
    Type: Application
    Filed: April 22, 2021
    Publication date: August 5, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hye Sung PARK, Jong Hyuk PARK, Jin Woo BAE, Bo Un YOON, Il Young YOON, Bong Sik CHOI
  • Patent number: 11011526
    Abstract: A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: May 18, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye Sung Park, Jong Hyuk Park, Jin Woo Bae, Bo Un Yoon, Il Young Yoon, Bong Sik Choi
  • Patent number: 10943908
    Abstract: A method of forming a semiconductor device includes forming a mold structure on a substrate, forming a first mask layer having a deposition thickness on the mold structure and patterning the first mask layer to form first mask openings which expose the mold structure. The mold structure is etched to form holes that penetrate the mold structure. The first mask layer is thinned to form mask portions having thickness smaller than the deposition thickness. Conductive patterns are formed to fill the holes and the first mask openings. The first mask layer including the mask portions is etched to expose the mold structure. The conductive patterns include protrusions. A chemical mechanical polishing process is performed to remove the protrusions of the conductive patterns.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: March 9, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Woo Bae, Su Young Shin, Young Ho Koh, Bo Un Yoon, Il Young Yoon, Yang Hee Lee, Hee Sook Cheon
  • Patent number: 10777560
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: September 15, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jonghyuk Park, Byoungho Kwon, Inho Kim, Hyesung Park, Jin-Woo Bae, Yanghee Lee, Inseak Hwang
  • Patent number: 10756092
    Abstract: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: August 25, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jonghyuk Park, Byoungho Kwon, Inho Kim, Hyesung Park, Jin-Woo Bae, Yanghee Lee, Inseak Hwang
  • Patent number: 10748906
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: August 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jonghyuk Park, Byoungho Kwon, Inho Kim, Hyesung Park, Jin-Woo Bae, Yanghee Lee, Inseak Hwang
  • Publication number: 20200227419
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 16, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jonghyuk PARK, Byoungho KWON, Inho KIM, Hyesung PARK, Jin-Woo BAE, Yanghee LEE, Inseak HWANG
  • Publication number: 20200227315
    Abstract: A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.
    Type: Application
    Filed: September 9, 2019
    Publication date: July 16, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hye Sung PARK, Jong Hyuk PARK, Jin Woo BAE, Bo Un YOON, II Young YOON, Bong Sik CHOI
  • Publication number: 20200212047
    Abstract: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.
    Type: Application
    Filed: March 10, 2020
    Publication date: July 2, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jonghyuk PARK, Byoungho KWON, Inho KIM, Hyesung PARK, Jin-Woo BAE, Yanghee LEE, Inseak HWANG
  • Patent number: 10622364
    Abstract: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: April 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jonghyuk Park, Byoungho Kwon, Inho Kim, Hyesung Park, Jin-Woo Bae, Yanghee Lee, Inseak Hwang