Patents by Inventor Jin-Young Kang

Jin-Young Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961775
    Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: April 16, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
  • Publication number: 20240119851
    Abstract: The present invention relates to a method and system for providing language learning services. The method of providing language learning services, according to the present invention, the method may include: activating, in response to receiving an input for acquiring a learning target image through a user terminal, a camera of the user terminal; specifying at least a portion of an image taken by the camera as the learning target image; receiving language learning information for the learning target image from a server; providing the language learning information to the user terminal; and storing, based on a request for storing of the language learning information, the language learning information in association with the learning target image, such that the learning target image is used in conjunction with learning of the language learning information.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 11, 2024
    Inventors: Eun Young LEE, Min Jung KIM, Yeun Hee KANG, Bong Hyun CHOI, Tae Un KIM, Soo Hyun LEE, Young Ho KIM, Chan Kyu CHOI, Jin Mo KU, Jong Won KIM
  • Publication number: 20240080450
    Abstract: The present invention discloses an image decoding method, the method including generating a candidate list including motion information derived from a spatial neighboring block and a temporal neighboring block adjacent to a current block; deriving motion information of the current block using the candidate list; generating a prediction block of the current block using the derived motion information; and updating the derived motion information in a motion information list, wherein the generating of the candidate list is performed in such a manner as to include at least one information of the motion information included in the updated motion information list in a block decoded before the current block.
    Type: Application
    Filed: November 2, 2023
    Publication date: March 7, 2024
    Applicants: Electronics and Telecommunications Research Institute, UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
    Inventors: Jung Won KANG, Ha Hyun LEE, Sung Chang LIM, Jin Ho LEE, Hui Yong KIM, Gwang Hoon PARK, Tae Hyun KIM, Dae Young LEE
  • Patent number: 11912674
    Abstract: The present invention provides methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, or organ fibrosis, which comprises administering to a subject a therapeutically effective amount of a pharmaceutical composition comprising an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 27, 2024
    Assignee: IL DONG PHARMACEUTICAL CO., LTD.
    Inventors: Jae-Hoon Kang, Hong-Sub Lee, Yoon-Suk Lee, Jin-Ah Jeong, Sung-Wook Kwon, Jeong-Guen Kim, Kyung-Sun Kim, Dong-Keun Song, Sun-Young Park, Kyeo-Jin Kim, Ji-Hye Choi, Hey-Min Hwang
  • Patent number: 11912222
    Abstract: An embodiment vehicle panel assembly includes an inner panel configured to wrap a roof and opposite pillars of a vehicle body, the inner panel including a second inner assembly portion provided at pillar-side opposite side parts and a guide portion provided at an upper side of the second inner assembly portion, and an outer panel configured to be loaded from above the inner panel and coupled to the inner panel to wrap an outside of the inner panel, the outer panel including a second outer assembly portion provided at a side part, the second outer assembly portion configured to be guided downwards by the guide portion when loaded from above and facing the second inner assembly portion after loading, wherein the second outer assembly portion is fastened to the second inner assembly portion.
    Type: Grant
    Filed: October 25, 2022
    Date of Patent: February 27, 2024
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Hyun Cheol Yun, Dong Ho Kang, Jin Young Mo
  • Patent number: 11040287
    Abstract: Disclosed are an experience-oriented virtual baseball game apparatus that enables a user to practice baseball or play a baseball game with a virtual player in a virtual baseball image projected on a screen based on the virtual baseball image, configured such that the user experiences a very interesting war of nerves between a pitcher and a batter, for example, the user pitches a ball toward the screen in order to induce a virtual batter in the image to ground out or to fly out through the location of his/her pitch or the virtual batter makes a hit or hits a home run due to a careless pitch of the user, through the baseball game, and a virtual baseball game control method using the same.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: June 22, 2021
    Assignee: NEWDIN CONTENTS CO., LTD.
    Inventor: Jin Young Kang
  • Publication number: 20190201794
    Abstract: Disclosed are an experience-oriented virtual baseball game apparatus that enables a user to practice baseball or play a baseball game with a virtual player in a virtual baseball image projected on a screen based on the virtual baseball image, configured such that the user experiences a very interesting war of nerves between a pitcher and a batter, for example, the user pitches a ball toward the screen in order to induce a virtual batter in the image to ground out or to fly out through the location of his/her pitch or the virtual batter makes a hit or hits a home run due to a careless pitch of the user, through the baseball game, and a virtual baseball game control method using the same.
    Type: Application
    Filed: July 14, 2017
    Publication date: July 4, 2019
    Applicant: NEWDIN CONTENTS CO.,LTD.
    Inventor: Jin Young KANG
  • Patent number: 5874347
    Abstract: Disclosed is a device isolating method of a semiconductor device, comprising the steps of sequentially forming a pad oxide film, a polysilicon film and an insulating layer, on a silicon substrate, said insulating layer being composed of a first silicon oxide film, a nitride film and a second silicon oxide film formed sequentially on the polysilicon film; defining active and inactive regions by using a patterned photomask; removing the insulating layer only on the inactive region so as to expose a surface of the polysilicon film; forming a side wall at both edges of the insulating layer on the active region, said side wall being composed of a nitride film; depositing a third silicon oxide film on the surface of the polysilicon film; removing the side wall and etching the substrate to a predetermined depth to form a trench; filling an insulating material into the trench and depositing it up to the second silicon oxide so as to form an insulating film for isolating; simultaneously removing the second silicon oxi
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: February 23, 1999
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunications Authority
    Inventors: Byung-Ryul Ryum, Tae-Hyeon Han, Soo-Min Lee, Deok-Ho Cho, Jin-Young Kang
  • Patent number: 5696020
    Abstract: Disclosed is a device isolating method of a semiconductor device, comprising the steps of sequentially forming a pad oxide film, a polysilicon film and an insulating layer, on a silicon substrate, said insulating layer being composed of a first silicon oxide film, a nitride film and a second silicon oxide film formed sequentially on the polysilicon film; defining active and inactive regions by using a patterned photomask; removing the insulating layer only on the inactive region so as to expose a surface of the polysilicon film; forming a side wall at both edges of the insulating layer on the active region, said side wall being composed of a nitride film; depositing a third silicon oxide film on the surface of the polysilicon film; removing the side wall and etching the substrate to a predetermined depth to form a trench; filling an insulating material into the trench and depositing it up to the second silicon oxide so as to form an insulating film for isolating; simultaneously removing the second silicon oxi
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: December 9, 1997
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
    Inventors: Byung-Ryul Ryum, Tae-Hyeon Han, Soo-Min Lee, Deok-Ho Cho, Jin-Young Kang
  • Patent number: 5496745
    Abstract: Disclosed is a fabrication of a bipolar transistor using an enhanced trench isolation so as to improve integration and performance thereof, comprising the steps of sequentially etching back portions corresponding to a trench using a trench forming mask to a predetermined depth of the buried collector to form the trench; filling an isolation insulating layer into the trench; polishing the isolation insulating layer up to a surface of the silicon oxide layer; sequentially forming a second insulating layer on the isolating insulating layer and the silicon oxide layer; removing the first polysilicon layer and the first insulating layer formed on an inactive region other than an active region defined by the trench; thermal-oxidizing the collector layer formed on the inactive region to form a thermal oxide layer; removing the second insulating layer and sequentially forming a third polysilicon, a third insulating layer and a second nitride layer; etching back layers formed on a portion of the first insulating layer
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: March 5, 1996
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunications Authority
    Inventors: Byung-Ryul Ryum, Tae-Hyeon Han, Soo-Min Lee, Deok-Ho Cho, Seong-Hearn Lee, Jin-Young Kang
  • Patent number: 5484737
    Abstract: Disclosed is a fabrication of a bipolar transistor with a super self-aligned vertical structure in which emitter, base and collector are vertically self-aligned, the fabrication method comprising the steps of forming a conductive buried collector region in a silicon substrate by using ion-implantation of an impurity and thermal-annealing; sequentially forming several layers; selectively removing the nitride and polysilicon layers to form a pattern; sequentially forming a silicon oxide layer, a third layer and a silicon oxide layer thereon; forming a patterned photoresist layer thereon to define active and inactive regions and removing several layers on the active region to form an opening; forming a side wall on both sides of the opening; forming a collector on a surface portion of the buried collector region up to a lower surface of the polysilicon layer; removing the side wall and the third nitride layer to expose a side surface of the second polysilicon layer; selectively forming a base on an upper surface
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: January 16, 1996
    Assignees: Electronics & Telecommunications Research Institute, Korea Telecommunication Authority
    Inventors: Byung-Ryul Ryum, Tae-Hyeon Han, Soo-Min Lee, Deok-Ho Cho, Seong-Hearn Lee, Jin-Young Kang
  • Patent number: 5444014
    Abstract: Disclosed is a method of fabricating an SOI substrate, comprising the steps of forming a first insulating layer on a single crystal silicon substrate; patterning the first insulating layer to form an opening; growing a single crystal silicon in the opening to form active and inactive regions; polishing the active region 31 as the first insulating layer as a polishing stopper to form a planarized surface; depositing a second insulating layer on the planarized surface; bonding a bonding substrate to the second insulating layer; and polishing the silicon substrate using the first insulating layer as a stopper up to a surface of the active region. By the method, a stray capacitance occurring between an SOI substrate and a metal wiring portion formed thereon can be significantly reduced owing to a relatively thick insulating layer therebetween, and a parasitic capacitance can be eliminated owing to an insulating layer interposed between a bonding substrate and an active region to be used as a buried collector.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: August 22, 1995
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority
    Inventors: Byung-Ryul Ryum, Tae-Hyeon Han, Soo-Min Lee, Deok-Ho Cho, Seong-Hearn Lee, Jin-Young Kang