Abstract: CAN bus drive slew rate control is used to suppress ringing using bus impedance matching that is only activated during and shortly after the bus driver unit transitions from driving the bus “dominant” to “recessive”. In one embodiment a bus impedance matching unit is a differential input and differential output operational trans-conductance amplifier (OTA). The differential OTA absorbs or provides the ringing current based on bus differential voltage. In another embodiment a bus impedance matching unit is a back-to-back connected RON regulated transistor pair together with a gate control related circuit. Where the total RON is equal to the CAN bus characteristic impedance.

Abstract: DC-DC power converter control comprises current starved delay lines for phase shifting control signals that set and reset a RS flip-flop to provide controllable PWM pulse widths from narrow to wide at a clock frequency. Precise pulse width control and a guaranteed minimum pulse width for pulse frequency modulation (PFM) control the DC-DC power converter during low power demand is also provided. PFM control maintains the same pulse width while decreasing the number of pulses per second when the output voltage exceeds an upper value and increases the number of pulses per second when the output voltage is less than a lower value. Voltage-to-current converters provide control currents to the current starved delay lines that provide the control signals to the SET and RESET inputs of the RS flip-flop. A D-flip-flop may further be used to improved circuit operation when generating high duty cycle (>50 percent) pulse widths.

Abstract: CAN bus drive slew rate control is used to suppress ringing using bus impedance matching that is only activated during and shortly after the bus driver unit transitions from driving the bus “dominant” to “recessive”. In one embodiment a bus impedance matching unit is a differential input and differential output operational trans-conductance amplifier (OTA). The differential OTA absorbs or provides the ringing current based on bus differential voltage. In another embodiment a bus impedance matching unit is a back-to-back connected RON regulated transistor pair together with a gate control related circuit. Where the total RON is equal to the CAN bus characteristic impedance.

Abstract: DC-DC power converter control comprises current starved delay lines for phase shifting control signals that set and reset a RS flip-flop to provide controllable PWM pulse widths from narrow to wide at a clock frequency. Precise pulse width control and a guaranteed minimum pulse width for pulse frequency modulation (PFM) control the DC-DC power converter during low power demand is also provided. PFM control maintains the same pulse width while decreasing the number of pulses per second when the output voltage exceeds an upper value and increases the number of pulses per second when the output voltage is less than a lower value. Voltage-to-current converters provide control currents to the current starved delay lines that provide the control signals to the SET and RESET inputs of the RS flip-flop. A D-flip-flop may further be used to improved circuit operation when generating high duty cycle (>50 percent) pulse widths.

Abstract: A power converter includes a buck leg circuit connected between a voltage input of the power converter and ground, a boost leg circuit connected between a voltage output of the power converter and ground, an inductor connected between the buck leg circuit and the boost leg circuit, an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal, and a control circuit. The control circuit is configured to generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode, and to generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.

Abstract: A power converter includes a buck leg circuit connected between a voltage input of the power converter and ground, a boost leg circuit connected between a voltage output of the power converter and ground, an inductor connected between the buck leg circuit and the boost leg circuit, an error amplifier configured to compare the voltage output of the power converter against a reference voltage to yield a feedback signal, and a control circuit. The control circuit is configured to generate a reference buck ramp configured to be compared against the feedback signal to determine whether to operate the buck leg circuit in buck mode, and to generate a reference boost ramp by superposing a variable boost ramp portion on to the reference buck ramp, the reference boost ramp configured to be compared against the feedback signal to determine whether to operate the boost leg circuit in boost mode.